UPD16488AP NEC [NEC], UPD16488AP Datasheet - Page 63

• Manufacturer Part Number: UPD16488AP
• Description: 1/92 DUTY LCD CONTROLLER/DRIVER WITH FOUR-LEVEL GRAY SCALE, ON-CHIP RAM
• Manufacturer: NEC [NEC]

6.17 Blink Data Memory Access Register (R16)
is written directly to the blink data RAM.
Default settings (initial values set by reset command, all data)
6.18 Inverted X Address Register (R17)
incremented each time the inversion RAM is accessed.
Default settings (initial values set by reset command)
6.19 Inversion Start Line Address Register (R18)
using reverse (inverted) display mode. The range of inverted lines is determined based on the contents of this register and
the inversion end line address register.
Default settings (initial values set by reset command)
The blink data memory access register is used to access the blink data RAM. When this register is write-accessed, data
When using reset command to reset, the contents of memory are retained.
The inverted X address register specifies the X address in the inverted data RAM accessed by the CPU. This address is
The inversion start line address register specifies the start line address in the display RAM accessed by the CPU when
RS
RS
RS
D
D
D
1
0
1
−
1
−
7
7
7
Data
0
1
D
D
D
D
D
D
D
0
−
−
−
0
7
7
6
7
6
7
6
Normal
Blink
ISL6
D
D
D
D
D
D
D
0
−
−
0
6
6
5
6
5
6
5
ISL5
Status
D
D
D
D
D
D
D
0
−
−
0
5
5
4
5
4
5
4
ISL4
D
D
D
D
D
D
D
0
−
0
0
4
4
3
4
3
4
3
IXA3
ISL3
D
D
D
D
D
D
D
Data Sheet S15745EJ2V0DS
0
0
0
3
3
2
3
2
3
2
IXA2
ISL2
D
D
D
D
D
D
D
0
0
0
2
1
2
1
2
1
2
IXA1
ISL1
D
D
D
D
D
D
D
0
0
0
1
1
0
1
0
1
0
IXA0
ISL0
D
D
D
D
0
0
0
0
µ µ µ µ PD16488A
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