pll2073x Samsung Semiconductor, Inc., pll2073x Datasheet - Page 10

• Manufacturer Part Number: pll2073x
• Description: Description = PLL2073X 20MHz ~ 300MHz FSPLL ;; Function = FSPLL ;; Configuration = 20M~300MHz FSPLL ;; Library Type = STD130 ;; Characteristic = 1.8/3mA
• Manufacturer: Samsung Semiconductor, Inc.

0.18 m 20MHZ ~ 300MHZ FSPLL
PIN LAYOUT GUIDE
10
M[7] ~ M[0]
P[5] ~ P[0]
S[1] ~ S[0]
Pin Name
AVDD18D
AVDD18A
AVSS18D
AVSS18A
FILTER
VABB
FOUT
PWD
FIN
External/Internal
Internal/External
Internal/External
Internal/External
Internal/External
Pin Usage
External
External
External
External
External
External
External
Use dedicated power/ground pins for PLL
Power cuts are required to provide on-chip isolation
Use good power and ground source on board
Do not place noisy, high frequency and high power consuming circuitry
pads near the FIN.
Use proper low jitter reference clock
Do not place noisy, high frequency and high power consuming circuitry
pads near the FOUT.
Internal routing path should be short. This will minimize loading effect.
FOUT signals should not be crossed by any signals and should not run
next to digital signals.
This will minimize capacitive coupling between the two signals.
Do not place noisy, high frequency and high power consuming circuitry
pads near the FILTER.
Ground shielding is needed for internal routing path.
FILTER routing path should not be crossed by any signals and should
not run next to digital signals.
External loop filter pin should be placed between analog power and
ground to avoid stray coupling outside the chip and magnetic coupling
via bond wires.
Loop filter components should be placed as close as possible.
=> between dedicated PLL power/ground and all other power/ground
Pin Layout Guide
PLL2073X