PLL502-11 PhaseLink (PLL), PLL502-11 Datasheet - Page 2

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PLL502-11

Manufacturer Part Number
PLL502-11
Description
, 12-25MHz In, 96-200MHz Out, Pecl
Manufacturer
PhaseLink (PLL)
Datasheet
PIN DESCRIPTIONS
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
Input Static Discharge Voltage Protection
96MHz – 200MHz Low Phase Noise PECL VCXO (12 – 25MHz Crystals)
GND_BUF
VDD_BUF
Name
XOUT
CLKB
GND
VDD
CLK
XIN
VIN
OE
Number
7,8,9,10
1,2,16
PARAMETERS
11,15
12
13
14
3
4
5
6
Type
P
P
P
O
P
O
I
I
I
I
+3.3V Power supply connectors.
Crystal input pin.
Crystal output pin.
Output enable input pin. Disables (tri-state) output when low. Internal
pull-up enables output by default if pin is not connected to low.
Frequency control voltage input pin.
GND Power connectors.
GND connector for output buffers.
True clock output pin.
+3.3V Power supply connector for output buffers.
Complementary clock output pin.
SYMBOL
V
V
T
T
V
T
DD
O
S
A
J
I
Description
Preliminary
V
V
MIN.
SS
SS
-65
-40
-
-
0.5
0.5
PLL502-11
V
V
MAX.
DD
DD
150
125
260
85
7
2
+
+
0.5
0.5
Rev 7/15/02 Page 2
UNITS
kV
V
V
V
C
C
C
C

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