TC4011BFN(F,N,M) Toshiba, TC4011BFN(F,N,M) Datasheet

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TC4011BFN(F,N,M)

Manufacturer Part Number
TC4011BFN(F,N,M)
Description
IC GATE NAND QUAD 2INP 14-SOL
Manufacturer
Toshiba
Series
4000Br
Datasheet

Specifications of TC4011BFN(F,N,M)

Logic Type
NAND Gate
Number Of Inputs
2
Number Of Circuits
4
Current - Output High, Low
3.4mA, 3.4mA
Voltage - Supply
3 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
TC4011BFN(N)
TC4011BFN(N,M)
TC4011BFNFNM
TC4011BFNNM
TC4011BFNNM
TC4011B Quad 2 Input NAND Gate
inverters as buffers, the input/output characteristics have been
improved and the variation of propagation delay time due to the
increase in load capacity is kept down to the minimum.
Pin Assignment
Logic Diagram
TC4011BP,TC4011BF,TC4011BFN,TC4011BFT
The TC4011B is 2-input positive logic NAND gate respectively.
Since all the outputs of these gates are provided with the
A
B
V
A1
B1
X1
X2
B2
A2
SS
1
2
3
4
5
6
7
(top view)
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
14
13
12
11
10
9
8
V
A4
B4
X4
X3
B3
A3
DD
X =
A・
B
1
X
Note: xxxFN (JEDEC SOP) is not available in
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
SOL14-P-150-1.27
TSSOP14-P-0044-0.65A
TC4011BP
TC4011BF
TC4011BFN
TC4011BFT
Japan.
TC4011BP/BF/BFN/BFT
: 0.96 g (typ.)
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.06 g (typ.)
2007-10-01

Related parts for TC4011BFN(F,N,M)

TC4011BFN(F,N,M) Summary of contents

Page 1

... TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4011BP,TC4011BF,TC4011BFN,TC4011BFT TC4011B Quad 2 Input NAND Gate The TC4011B is 2-input positive logic NAND gate respectively. Since all the outputs of these gates are provided with the inverters as buffers, the input/output characteristics have been improved and the variation of propagation delay time due to the increase in load capacity is kept down to the minimum ...

Page 2

... Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc) ...

Page 3

Static Electrical Characteristics Characteristics Symbol |I OUT High-level V OH output voltage OUT Low-level V OL output voltage Output high current ...

Page 4

Dynamic Electrical Characteristics Characteristics Output transition time Output transition time Propagation delay time Propagation delay time Input capacitance Circuit and Waveform for Measurement of Dynamic Characteristics Circuit V DD P.G. Input V SS (Ta = 25° ...

Page 5

Package Dimensions Weight: 0.96 g (typ.) TC4011BP/BF/BFN/BFT 5 2007-10-01 ...

Page 6

Package Dimensions Weight: 0.18 g (typ.) TC4011BP/BF/BFN/BFT 6 2007-10-01 ...

Page 7

Package Dimensions (Note) Note: This package is not available in Japan. Weight: 0.12 g (typ.) TC4011BP/BF/BFN/BFT 7 2007-10-01 ...

Page 8

Package Dimensions Weight: 0.06 g (typ.) TC4011BP/BF/BFN/BFT 8 2007-10-01 ...

Page 9

... Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. • The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. • ...

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