lc51024vg Lattice Semiconductor Corp., lc51024vg Datasheet - Page 9

• Manufacturer Part Number: lc51024vg
• Description: 3.3v In-system Programmable Superbig, Superwide High Density Plds Tm Tm
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
ispMACH 5000B Family Data Sheet
that ensures that the port remains compliant to the IEEE 1532 standard. By using IEEE 1532 as the communication
interface through which ISP is achieved, customers get the benefit of a standard, well-defined interface.
The ispMACH 5000B devices can be programmed across the commercial temperature and voltage range. The PC-
based Lattice software facilitates in-system programming of ispMACH 5000B devices. The software takes the
JEDEC file output produced by the design implementation software, along with information about the JTAG chain,
and creates a set of vectors that are used to drive the JTAG chain. The software can use these vectors to drive a
JTAG chain via the parallel port of a PC. Alternatively, the software can output files in formats understood by com-
mon automated test equipment. This equipment can then be used to program ispMACH 5000B devices during the
testing of a circuit board.
Security Scheme
A programmable security scheme is provided on the ispMACH 5000B devices as a deterrent to unauthorized copy-
ing of the array configuration patterns. Once programmed, this security prevents readback of the programmed pat-
tern by a device programmer, securing proprietary designs from competitors. The security scheme also prevents
programming and verification. The entire device must be erased in order to reset the security scheme.
Hot Socketing
The ispMACH 5000B devices are well suited for those applications that require hot socketing capability. Hot socket-
ing a device requires that the device, when powered down, can tolerate active signals on the I/Os and inputs with-
out being damaged. Additionally, it requires that the effects of the powered-down device be minimal on active
signals.
Density Migration
The ispMACH 5000B family has been designed to ensure that different density devices in the same package have
the same pin-out. Furthermore, the architecture ensures a high success rate when performing design migration
from lower density parts to higher density parts. In many cases, it is possible to shift a lower utilization design tar-
geted for a high density device to a lower density device. However, the exact details of the final resource utilization
will impact the likely success in each case.
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