MC74VHC32DTG ON Semiconductor, MC74VHC32DTG Datasheet

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MC74VHC32DTG

Manufacturer Part Number
MC74VHC32DTG
Description
IC GATE OR QUAD 2-1 ADV 14-TSSOP
Manufacturer
ON Semiconductor
Series
74VHCr
Datasheet

Specifications of MC74VHC32DTG

Logic Type
OR Gate
Number Of Inputs
2
Number Of Circuits
4
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC74VHC32DTG
Manufacturer:
WURTHELEK
Quantity:
30 000
MC74VHC32
Quad 2-Input OR Gate
gate fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
© Semiconductor Components Industries, LLC, 2010
January, 2010 − Rev. 5
The MC74VHC32 is an advanced high speed CMOS 2−input OR
The internal circuit is composed of three stages, including a buffer
High Speed: t
Low Power Dissipation: I
High Noise Immunity: V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: V
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Chip Complexity: 48 FETs or 12 Equivalent Gates
Pb−Free Packages are Available*
Figure 2. Pinout: 14−Lead Packages
V
A1
B1
A2
B2
A3
B3
A4
B4
A1
14
CC
1
1
2
4
5
9
10
12
13
Figure 1. Logic Diagram
B4
13
B1
2
Human Body Model > 2000 V;
Machine Model > 200 V
PD
OLP
A4
12
Y1
3
(Top View)
= 3.8 ns (Typ) at V
= 0.8 V (Max)
Y4
A2
11
4
NIH
B3
B2
10
CC
5
= 2.0 mA (Max) at T
= V
A3
Y2
9
6
NIL
11
3
6
8
CC
GND
Y3
= 28% V
8
7
Y1
Y2
Y3
Y4
= 5.0 V
Y = A+B
CC
A
= 25°C
1
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
14
14
CASE 751A
CASE 948G
SOEIAJ−14
DT SUFFIX
(Note: Microdot may be in either location)
M SUFFIX
CASE 965
D SUFFIX
SOIC−14
TSSOP
ORDERING INFORMATION
A
WL, L
Y
WW, W = Work Week
G or G = Pb−Free Package
1
A
H
H
L
L
1
http://onsemi.com
FUNCTION TABLE
Inputs
= Assembly Location
= Wafer Lot
= Year
B
H
H
L
L
Publication Order Number:
14
14
1
1
Output
14
DIAGRAMS
MARKING
1
H
H
H
Y
74VHC32
L
AWLYWW
ALYWG
VHC32G
MC74VHC32/D
ALYW G
VHC
32
G

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MC74VHC32DTG Summary of contents

Page 1

MC74VHC32 Quad 2-Input OR Gate The MC74VHC32 is an advanced high speed CMOS 2−input OR gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The ...

Page 2

MAXIMUM RATINGS Symbol Parameter V DC Supply Voltage Input Voltage Output Voltage out I Input Diode Current IK I Output Diode Current Output Current, per Pin out I DC Supply Current, ...

Page 3

AC ELECTRICAL CHARACTERISTICS Symbol Parameter t , Maximum Propagation PLH t Delay, PHL Maximum Input Capacitance in C Power Dissipation Capacitance (Note defined as the value of the internal ...

Page 4

... ORDERING INFORMATION Device MC74VHC32DR2 MC74VHC32DR2G MC74VHC32DT MC74VHC32DTG MC74VHC32DTR2 MC74VHC32DTR2G MC74VHC32MELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. Package SOIC−14 SOIC−14 (Pb− ...

Page 5

... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...

Page 6

... S A −V− C 0.10 (0.004) −T− G SEATING D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...

Page 7

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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