LT6557 LINER [Linear Technology], LT6557 Datasheet - Page 9

• Manufacturer Part Number: LT6557
• Description: 500MHz, 2200V/?s Gain of 2, Single Supply Triple Video Amplifi er with Input Bias Control
• Manufacturer: LINER [Linear Technology]

Programmable Input Bias
The LT6557 contains circuitry that provides a user-pro-
grammed bias voltage to the inputs of all three amplifi er
sections. The internal biasing feature is designed to mini-
mize external component count in AC-coupled applica-
tions, but may be defeated if external biasing is desired.
Figure 1 shows the simplifi ed equivalent circuit feeding
the noninverting input of each amplifi er. A programming
resistor from Pin 16 to GND (Pin 2) establishes the nominal
APPLICATIONS INFORMATION
Figure 1. Simplifi ed Programmable Input Bias Circuit Diagram
Figure 2. Simplifi ed Shutdown Circuit Diagram
IN
40k
2.5k
EN
(3a) Open Drain or Open Collector
DISABLE
V
EN
+
6557 F01
V
+
CIRCUITRY
BIAS
9.1k
I =
V
Figure 3. Suitable Shutdown Pin Drive Circuits
R
PIN16
SET
1
LT6557
V
+
2
no-signal amplifi er input bias condition according to the
following relationship:
where V
For single 5V supply operation, a 400Ω programming
resistor is generally optimal. In applications that demand
maximum amplifi er linearity, or if external biasing is
preferred (in DC-coupled applications, for example), the
internal biasing circuitry may be disabled by leaving Pin
16 open. With Pin 16 open, input loading is approximately
200kΩ.
Shutdown Control
The LT6557 may be placed into a shutdown mode, where
all three amplifi er sections are deactivated and power sup-
ply draw is reduced to approximately 10µA. When the EN
pin is left open, an internal 40k pull-up resistor brings the
pin to V
the pin more than approximately 1.5V below V
able the LT6557 (see Figure 2 for equivalent circuit). The
pull-down current required to activate the part is typically
125µA. In most applications, the EN pin is simply con-
nected to ground (for continuous operation) or driven
directly by a CMOS-level logic gate (see Figure 3 for
examples). Response time is typically 50ns for enabling,
and 1µs for shutdown. In shutdown mode, the feedback
resistors remain connected between the output pins and
the individual ground (or V
V
BIAS IN
(3b) CMOS Gate with Shared Supply
EN
+
DISABLE
( )
PIN16
and the part enters the shutdown mode. Pulling
=
V
= 0.048V typical.
PIN
R
16
SET
• .
9 1
1
k
–
LT6557
V
connected) pins.
+
2
6557 F03
LT6557
+
will en-
6557fa
9