LTC1408 LINER [Linear Technology], LTC1408 Datasheet - Page 9

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LTC1408

Manufacturer Part Number
LTC1408
Description
Channel, 14-Bit, 600ksps Simultaneous Sampling ADC with Shutdown
Manufacturer
LINER [Linear Technology]
Datasheet

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PI FU CTIO S
CONV (Pin 30): Convert Start. Holds the six analog input
signals and starts the conversion on the rising edge. Two
pulses with SCK in fixed high or fixed low state starts Nap
mode. Four or more pulses with SCK in fixed high or fixed
low state starts Sleep mode.
DGND (Pin 31): Digital Ground. This ground pin must be
tied directly to the solid ground plane. Digital input signal
currents flow through this pin.
BLOCK DIAGRA
U
U
U
CH0
CH0
CH1
CH1
CH2
CH2
CH3
CH3
CH4
CH4
CH5
CH5
+
+
+
+
+
+
W
10
11
12 13
14
15
16
17
18
19
20
21
4
5
6
7
8
9
EXPOSED PAD
+
+
+
+
+
+
S & H
S & H
S & H
S & H
S & H
S & H
GND
33
MUX
REFERENCE
2.5V
22
10µF
V
REF
14-BIT ADC
600ksps
23
0.1µF
10µF
BIP
29
24
SCK (Pin 32): External Clock Input. Advances the conver-
sion process and sequences the output data at SD0 (Pin1)
on the rising edge. One or more pulses wake from sleep
or nap power saving modes. 16 clock cycles are needed
for each of the channels that are activated by SELx (Pins
26, 27, 28), up to a total of 96 clock cycles needed to
convert and read out all 6 channels.
EXPOSED PAD (Pin 33): GND. Must be tied directly to the
solid ground plane.
V
SEL2 SEL1 SEL0
CC
26
14-BIT LATCH 0
14-BIT LATCH 1
14-BIT LATCH 2
14-BIT LATCH 3
14-BIT LATCH 4
14-BIT LATCH 5
TIMING
LOGIC
3V
25
27
V
DD
28
31
DGND
OUTPUT
THREE-
SERIAL
STATE
PORT
LTC1408
30
32
3
1
2
OV
3V
SD0
OGND
1408 BD
DD
CONV
SCK
0.1µF
LTC1408
1408fa
9

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