LTC1726 LINER [Linear Technology], LTC1726 Datasheet - Page 8

• Manufacturer Part Number: LTC1726
• Description: Triple Supply Monitor and uP Supervisor with Adjustable Reset and Watchdog Timer
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
LTC1726-2.5 Override Functions
The V
This is an obvious solution since the trip points for V
and V
V
V
operating off of a 2.5V supply will result in the continuous
assertion of RST.
LTC1726
Figure 3 contains a simple circuit for 5V systems that can’t
risk the RST output going high in the 3.1V to 4.15V range
(possibly due to very slow rise time on the 5V supply).
Diode D1 powers the LTC1726-5 while dropping 0.6V
from the V
internal override circuit from being activated. Without the
override circuit active, the RST pin stays low until V
reaches V
8
CCA
CC3
. Likewise, the V
5V
CCA
must always be used. Tying V
CC25
0.1 F
Figure 3. LTC1726-5 Monitoring a Single 5V
Supply. D1 Used to Avoid RST High Near 3.1V
to 4V (See Figure 2).
pin, if unused, can be tied to either V
RT5
CC5
Figure 4. RST Output Voltage
Characteristics of the Circuit in Figure 3
will always be greater than the trip point for
5
4
3
2
1
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
pin to the V
V
10k PULL-UP FROM RST TO V
T
D1
A
CC5
4.675V. (See Figure 4.)
= 25 C
= V
1
2
3
4
U
CCA
D1: MMBD914 OR EQUIVALENT
PINS 5, 7 AND 8 NOT SHOWN FOR CLARITY
V
V
V
GND
CC25
CC3
CC5
CCA
= 0V TO 5V
LTC1726-5
CC3
V
, if unused, can be tied to V
U
CC5
RST
(V)
pin. This prevents the part’s
6
CC5
W
CC3
R1
10k
1726 F04
to V
TO SYSTEM
RESET
CC3
U
1726 F03
CC25
or V
CC25
CC3
and
CC5
CC3
.
.
Watchdog Timer
The watchdog circuit monitors a P’s activity. The P is
required to change the logic state of the WDI pin on a
periodic basis in order to clear the watchdog timer and
prevent the LTC1726 from issuing a reset.
During power-up, the watchdog timer remains cleared
while reset is asserted. As soon as the reset timer times
out, the watchdog timer is started. The watchdog timer will
continue to run until a transition is detected on the WDI
input or until the watchdog timer times out. Once the
watchdog timer times out, the internal circuitry asserts the
reset and starts the reset timer. When the reset timer times
out and reset is deasserted, the watchdog timer is again
started. If no WDI transition is received within the watch-
dog time-out period, the reset will be reasserted at the end
of the watchdog time-out period. If a transition is received
on the WDI input during the watchdog time-out period, the
watchdog timer will be restarted and reset will remain
deasserted.
Selecting the Reset and Watchdog
Time-Out Capacitors
The reset time-out period is adjustable in order to accom-
modate a variety of P applications. The reset time-out
period, t
between the RT pin and ground. The value of this capacitor
is determined as follows:
with C
The watchdog period is also adjustable so that the watch-
dog time-out period can be optimized for software execu-
tion. The watchdog time-out period, t
connecting a capacitor, C
ground. Once the optimum watchdog time-out period
(t
as follows:
with C
WT
C
C
RT
WT
) is determined, the value of the capacitor is calculated
RT
WT
= t
= t
RT
in pF and t
RT
in pF and t
WT
, is adjusted by connecting a capacitor, C
/3.30
/21.8
RT
WT
in s (i.e., 1500pF
in s (i.e., 1500pF
WT
, between the WT pin and
WT
, is adjusted by
4.95ms).
32.7ms).
RT
,