LTC1872BES6 LINER [Linear Technology], LTC1872BES6 Datasheet - Page 4

• Manufacturer Part Number: LTC1872BES6
• Description: Constant Frequency Current Mode Step-Up DC/DC Controller in ThinSOT
• Manufacturer: LINER [Linear Technology]

FUNCTIONAL DIAGRA
OPERATIO
LTC1872B
Main Control Loop
The LTC1872B is a constant frequency current mode
switching regulator. During normal operation, the external
N-channel power MOSFET is turned on each cycle by the
oscillator and turned off when the current comparator
(ICMP) resets the RS latch. The peak inductor current at
which ICMP resets the RS latch is controlled by the voltage
on the I
amplifier EAMP. An external resistive divider connected
between V
output feedback voltage V
creases, it causes a slight decrease in V
0.8V reference, which in turn causes the
I
current matches the new load current.
The main control loop is shut down by pulling the I
pin low. Releasing I
current source to charge up the external compensation
network. When the I
control loop is enabled with the I
4
TH
/RUN voltage to increase until the average inductor
U
TH
OUT
/RUN pin, which is the output of the error
U
and ground allows the EAMP to receive an
U
TH
GND
TH
V
(Refer to Functional Diagram)
5
2
IN
/RUN pin reaches 0.35V, the main
/RUN allows an internal 0.5 A
SENSE
FB
4
4
. When the load current in-
–
FOLDBACK
FREQ
OSC
15mV
W
TH
+
–
/RUN voltage then
+
–
FB
ICMP
relative to the
0.5 A
UNDERVOLTAGE
SLOPE
COMP
REFERENCE
LOCKOUT
VOLTAGE
V
–
+
IN
TH
/RUN
0.3V
V
0.8V
REF
pulled up to its zero current level of approximately 0.7V.
As the external compensation network continues to charge
up, the corresponding output current trip level follows,
allowing normal operation.
Comparator OVP guards against transient overshoots
> 7.5% by turning off the external N-channel power
MOSFET and keeping it off until the fault is removed.
Low Load Current Operation
Under very light load current conditions, the I
voltage will be very close to the zero current level of 0.85V.
As the load current decreases further, an internal offset at
the current comparator input will assure that the current
comparator remains tripped (even at zero load current)
and the regulator will start to skip cycles, as it must, in
order to maintain regulation. This behavior allows the
regulator to maintain constant frequency down to very
light loads, resulting in less low frequency noise genera-
tion over a wide load current range.
0.35V
1
I
R
S
TH
RS
/RUN
+
–
Q
SHDN
CMP
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
SHDN
UV
EAMP
OVP
+
+
–
–
1.2V
V
IN
V
+
60mV
V
0.8V
REF
REF
V
IN
NGATE
1872B FD
V
6
3
FB
TH
/RUN pin