LTC3413 LINER [Linear Technology], LTC3413 Datasheet - Page 11

• Manufacturer Part Number: LTC3413
• Description: 3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
125 C.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (R
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to I
resistance of C
discharge C
the regulator to return V
During this recovery time, V
overshoot or ringing that would indicate a stability prob-
lem. The I
tor shown in Figure 1a will provide adequate compensa-
tion for most applications.
Output Voltage Tracking of V
For applications in which the V
V
voltage on the V
track the input voltage, any disturbance on V
on V
the input voltage to drop if there is insufficient bulk
capacitance at the V
output voltage during the load step transient is caused by
the V
poor load regulation.
IN
pin, the output voltage will be equal to one-half of the
OUT
OUT
. For example, a load step transient could cause
tracking of V
TH
LOAD
OUT
pin external components and output capaci-
generating a feedback error signal used by
(ESR), where ESR is the effective series
OUT
IN
U
.
pin. Because the output voltage will
IN
OUT
IN
pin. The corresponding drop in the
I
LOAD
and should not be confused with
immediately shifts by an amount
U
OUT
REF
also begins to charge or
OUT
REF
to its steady-state value.
pin is connected to the
can be monitored for
W
IN
will appear
U
DS(ON)
).
Design Example
As a design example, consider using the LTC3413 in an
application with the following specifications: V
V
First, calculate the timing resistor:
Use a standard value of 309k. Next, calculate the inductor
value for about 40% ripple current:
Using a 0.47 H inductor results in a maximum ripple
current of:
C
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. For this design, two
100 F ceramic capacitors will be used. C
for a maximum current rating of:
Decoupling the PV
OUT
OUT
R
I
L
RMS
OSC
I
L
will be selected based on the ESR that is required to
= 1.25V, I
1
MHz
3
1
3 23 10
1 25
MHz
A
.
.
1 10
• .
1 25
•
OUT(MAX)
1 25
2 5
1 2
V
.
•
.
.
• .
0 47
6
V
A
IN
V
V
11
pins with two 100 F capacitors is
–
1
1 25
–
H
= 3A, f = 1MHz.
10
2 5
.
.
1 25
2 5
k
.
V
.
1
V
–
V
V
–
1 25
2 5
1 1 5
313
.
.
V
V
0 47
k
.
.
IN
A
LTC3413
should be sized
RMS
1 33
H
.
IN
A
sn3413 3413fs
11
= 2.5V,