LTC3532 LINER [Linear Technology], LTC3532 Datasheet - Page 10

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LTC3532

Manufacturer Part Number
LTC3532
Description
Micropower Synchronous Buck-Boost DC/DC Converter
Manufacturer
LINER [Linear Technology]
Datasheet

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OPERATIO
LTC3532
be minimized. Note that if the load current applied during
forced Burst Mode operation (BURST pin is grounded)
exceeds the current that can be supplied, the output voltage
will start to droop and the IC will automatically come out
of Burst Mode operation and enter fi xed frequency mode,
raising V
enter Burst Mode operation once again, and the cycle will
repeat, resulting in about 4% output ripple. Note that Burst
Mode operation is inhibited during soft-start.
Burst Mode Operation to Fixed Frequency Transient
Response
In Burst Mode operation, the compensation network is
not used and V
During long periods of Burst Mode operation, leakage
currents in the external components or on the PC board
could cause the compensation capacitor to charge (or
discharge), which could result in a large output transient
when returning to fi xed frequency mode of operation, even
at the same load current. To prevent this, the LTC3532
10
OUT
COMPARATORS
. Once regulation is achieved, the IC will then
C
TO PWM
is disconnected from the error amplifi er.
U
V
CI
SOFT-START
CLAMP
V
IN
ENABLE
Figure 5. Soft-Start Circuitry
CHIP
15μA
incorporates an active clamp circuit that holds the voltage
on V
This minimizes any output transient when returning to
fi xed frequency mode operation. For optimum transient
response, Type 3 compensation is also recommended
to broad band the control loop and roll off past the two
pole response of the output LC fi lter. (See Closing the
Feedback Loop.)
Soft-Start
The soft-start function is combined with shutdown. When
the SHDN/SS pin is brought above 1V typical, the IC is
enabled but the EA duty cycle is clamped from V
tailed diagram of this function is shown in Figure 5. The
components R
on SHDN/SS to provide a soft-start function. To ensure
that V
above 2.4V. To enable Burst Mode operation, SHDN/SS
must be raised to within 0.5V of V
+
+
C
ERROR AMP
C
at an optimal voltage during Burst Mode operation.
is not being clamped, SHDN/SS must be raised
1.22V
1V
SHDN/SS
SS
FB
V
10
9
8
C
and C
C
P1
SS
provide a slow ramping voltage
C
V
SS
OUT
R
R1
R2
SS
IN
ENABLE SIGNAL
.
3532 F05
C
. A de-
3532fc

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