LTC3824EMSE-PBF LINER [Linear Technology], LTC3824EMSE-PBF Datasheet - Page 5

• Manufacturer Part Number: LTC3824EMSE-PBF
• Description: High Voltage Step-Down Controller With 40?A Quiescent Current
• Manufacturer: LINER [Linear Technology]

TYPICAL PERFORMANCE CHARACTERISTICS
PIN FUNCTIONS
GND (Pin 1): Chip Ground Pin.
SYNC/MODE (Pin 2): Synchronization Input and Burst
Mode Operation Enable/Disable. If this pin is left open
or pulled higher than 2V, Burst Mode operation will be
enabled at light load and the typical threshold of entering
Burst Mode operation is one third of current limit. If this
pin is grounded or the synchronization pulse is present
with a frequency greater than 20kHz then Burst Mode
operation is disabled and the LTC3824 goes into pulse
skipping at light loads. To synchronize the LTC3824, the
duty cycle of the synchronizing pulse can range from 10%
to 70% and the synchronizing frequency has to be higher
than the programmed frequency.
R
LTC3824 switching frequency.
V
and the control signal of the current mode PWM control
loop. Switching starts at 0.7V, and higher V
to higher inductor current. When V
the LTC3824 goes into micropower shutdown.
C
SET
(Pin 4): The Output of the voltage error amplifi er gm
(Pin 3): A resistor from R
INDUCTOR
50mV/DIV
CURRENT
1A/DIV
V
OUT
Burst Mode Operation V
V
IN
=12V, V
OUT
= 5V, I
50μs/DIV
LOAD
SET
C
is pulled below 25mV,
= 200mA
to ground sets the
OUT
= 5V
C
corresponds
3824 G09
OUTPUT VOLTAGE
AC COUPLED
V
divider to this pin sets the output voltage. When V
less than 0.5V, the switching frequency will fold back to
50kHz to reduce the minimum on-cycle.
SS (Pin 6): Soft-Start Pin. A capacitor on this pin sets
the output ramp-up rate. The typical time for SS to
reach the programmed level is (C • 0.8V)/7μA.
SENSE (Pin 7): Current Sense Input Pin. A sense re-
sistor, R
100mV/R
V
ing is required.
GATE (Pin 9): Gate Drive for The External P-channel
MOSFET. Typical peak drive current is 2.5A and the drive
voltage is clamped to 8V when V
CAP (Pin 10): A Low ESR Capacitor of at Least 0.1μF is
required from this pin to V
tor for biasing the gate driver circuitry.
Exposed Pad (Pin 11): GND. Must be soldered to PCB with
expanded metal trace for rated thermal performance.
100mV/DIV
INDUCTOR
FB
CC
CURRENT
2A/DIV
(Pin 8): Chip Power Supply. Power supply bypass-
(Pin 5): Error Amplifi er Inverting Input. A resistor
S
Load Current Step Response
, from V
S
T
.
A
= 25°C unless otherwise noted.
IN
100μs/DIV
to SENSE sets the current limit to
CC
to bypass the internal regula-
CC
3824 G10
is higher than 9V.
LTC3824
FB
3824fc
5
is