74LVC161 Philips, 74LVC161 Datasheet - Page 9
74LVC161
Manufacturer Part Number
74LVC161
Description
Presettable synchronous 4-bit binary counter; asynchronous reset
Manufacturer
Philips
Datasheet
1.74LVC161.pdf
(14 pages)
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Philips Semiconductors
AC WAVEFORMS
V
V
V
output load.
Waveform 1.
delays, the clock pulse width and the maximum clock
frequency.
Waveform 2.
Waveform 3.
to output (Q
clock (CP) removal times.
1998 May 20
M
M
OL
Presettable synchronous 4-bit binary counter;
asynchronous reset
CP INPUT
Qn, TC OUTPUT
= 1.5 V at V
= 0.5 S V
and V
TC OUTPUT
Qn, TC OUTPUT
CET INPUT
V
GND
V
OL
OH
V
I
MR INPUT
CP INPUT
OH
V
V
GND
OH
OL
CC
V
V
n
I
GND
GND
V
are the typical output voltage drop that occur with the
OL
, TC) propagation delays and the master reset to
OH
CC
at V
V
V
Clock (CP) to outputs (Q
Input (CET) to output (TC) propagation delays.
Master reset (MR) pulse width, the master reset
I
I
w 2.7 V
CC
V
t
V
M
PHL
M
t
< 2.7 V
w
V
M
1/f
MAX
V
V
M
t
PLH
M
t
PHL
t
w
V
n
M
, TC) propagation
t
PLH
t
rem
t
PHL
SY00072
SY00071
SY00073
9
Waveform 4.
parallel enable input (PE).
Waveform 5.
TEST CIRCUIT
Waveform 6.
The shaded areas indicate when the input is permitted
to change for predictable output performance.
CP INPUT
CEP, CET
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
CP INPUT
PE INPUT
D
INPUT
GENERATOR
n
GND
GND
INPUT
PULSE
SWITCH POSITION
t
V
V
PLH/
TEST
GND
GND
GND
I
I
V
V
V
t
I
I
I
PHL
Load circuitry for switching times.
Setup and hold times for the input (D
CEP and CET setup and hold times.
V
t
su
Open
V
M
V
M
I
S
V
1
R
M
t
V
SU
T
t
SU
M
V
t
h
M
t
t
h
h
D.U.T.
V
CC
2.7–3.6V
< 2.7V
V
CC
V
O
C
L
2.7V
V
74LVC161
V
Product specification
CC
t
t
I
su
SU
50pF
t
SU
V
t
S
SV00903
n
h
t
M
t
h
1
500
500
h
SC00137
) and
SC00138
2 * V
Open
GND
CC