PCF8576C Philips Semiconductors, PCF8576C Datasheet - Page 21

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PCF8576C

Manufacturer Part Number
PCF8576C
Description
Universal LCD driver for low multiplex rates
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
After acknowledgement, one or more command bytes (m)
follow which define the status of the addressed
PCF8576Cs.
The last command byte is tagged with a cleared most
significant bit, the continuation bit C. The command bytes
are also acknowledged by all addressed PCF8576Cs on
the bus.
After the last command byte, a series of display data bytes
(n) may follow. These display bytes are stored in the
display RAM at the address specified by the data pointer
and the subaddress counter. Both data pointer and
subaddress counter are automatically updated and the
data is directed to the intended PCF8576C device.
The acknowledgement after each byte is made only by the
(A0, A1 and A2) addressed PCF8576C. After the last
display byte, the I
condition (P).
1998 Jul 30
Universal LCD driver for low multiplex
rates
handbook, full pagewidth
2
C-bus master issues a STOP
SDA
SCL
START condition
SDA
SCL
S
Fig.13 Definition of START and STOP conditions.
data valid
data line
stable;
Fig.12 Bit transfer.
21
allowed
change
of data
7.8
The command decoder identifies command bytes that
arrive on the I
continuation bit C in their most significant bit position
(Fig.17). When this bit is set, it indicates that the next byte
of the transfer to arrive will also represent a command.
If this bit is reset, it indicates the last command byte of the
transfer. Further bytes will be regarded as display data.
The five commands available to the PCF8576C are
defined in Table 5.
Command decoder
2
C-bus. All available commands carry a
STOP condition
MBA607
P
MBC622
Product specification
SDA
SCL
PCF8576C

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