ADS7830I Burr-Brown Corporation, ADS7830I Datasheet
ADS7830I
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ADS7830I Summary of contents
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Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES 70kHz SAMPLING RATE 0.5LSB INL/DNL 8 BITS NO MISSING CODES 4 DIFFERENTIAL/8 SINGLE-ENDED INPUTS 2. OPERATION BUILT-IN 2.5V REFERENCE/BUFFER 2 SUPPORTS ALL THREE I C MODES: Standard, Fast, and High-Speed LOW POWER: ...
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... ORDERING TRANSPORT NUMBER MEDIA, QUANTITY ADS7830IPWT Tape and Reel, 250 " ADS7830IPWR Tape and Reel, 2500 DESCRIPTION Analog Input Channel 0 Analog Input Channel 1 Analog Input Channel 2 Analog Input Channel 3 Analog Input Channel 4 Analog Input Channel 5 Analog Input Channel 6 ...
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ELECTRICAL CHARACTERISTICS: +2. – + +2.7V +2.5V, SCL Clock Frequency = 3.4MHz (High-Speed Mode), unless otherwise noted REF PARAMETER ANALOG INPUT Full-Scale Input Scan Absolute Input Range Capacitance ...
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ELECTRICAL CHARACTERISTICS: + – + +5.0V External +5.0V, SCL Clock Frequency = 3.4MHz (High-Speed Mode), unless otherwise noted REF PARAMETER ANALOG INPUT Full-Scale Input Scan Absolute Input Range ...
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TIMING DIAGRAM SDA t BUF t LOW SCL t HD; STA STOP START TIMING CHARACTERISTICS – + +2.7V, unless otherwise noted PARAMETER SYMBOL SCL Clock Frequency Bus Free Time Between ...
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TIMING CHARACTERISTICS – + +2.7V, unless otherwise noted PARAMETER SYMBOL Rise Time of SDA Signal t Fall Time of SDA Signal t Setup Time for STOP Condition t SU Capacitive ...
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TYPICAL CHARACTERISTICS +2.7V, V External +2.5V REF FFT vs FREQUENCY 100 0 10 Frequency (kHz) DIFFERENTIAL LINEARITY ERROR vs CODE (2.5V Internal Reference) 0.5 0.4 0.3 ...
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TYPICAL CHARACTERISTICS +2.7V, V External +2.5V REF CHANGE IN GAIN vs TEMPERATURE 0.10 0.05 0 0.05 0. Temperature ( C) POWER-DOWN SUPPLY CURRENT vs TEMPERATURE 750 600 ...
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THEORY OF OPERATION The ADS7830 is a classic Successive Approximation Regis- ter (SAR) A/D converter. The architecture is based on ca- pacitive redistribution which inherently includes a sample- and-hold function. The converter is fabricated on a 0.6 CMOS process. The ...
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The following bus protocol has been defined (as shown in Figure 2): • Data transfer may be initiated only when the bus is not busy. • During data transfer, the data line must remain stable whenever the clock line is ...
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Address Byte MSB The address byte is the first byte received following the START condition from the master device. The first five bits (MSBs) of the slave address are factory pre-set ...
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READING DATA Data can be read from the ADS7830 by read-addressing the part (LSB of address byte set to 1) and receiving the transmitted byte. Converted data can only be read from the ADS7830 once a conversion has been initiated ...
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F/S Mode Mode Master Code HS Mode Enabled ADC Power-Down Mode Write-Addressing Byte ADC Converting Mode ...
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... PACKAGING INFORMATION ORDERABLE DEVICE STATUS(1) ADS7830IPWR ACTIVE ADS7830IPWT ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design ...
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PW (R-PDSO-G**) 14 PINS SHOWN 0, 0,15 1,20 MAX 0,05 PINS ** DIM A MAX A MIN NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body ...
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Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the ...