ADS7830I Burr-Brown Corporation, ADS7830I Datasheet - Page 12

no-image

ADS7830I

Manufacturer Part Number
ADS7830I
Description
8-Bit/ 8-Channel Sampling ANALOG-TO-DIGITAL CONVERTER with I2C Interface
Manufacturer
Burr-Brown Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADS7830I
Manufacturer:
TI/德州仪器
Quantity:
20 000
Part Number:
ADS7830IPW
Manufacturer:
TI/德州仪器
Quantity:
20 000
Part Number:
ADS7830IPWR
Manufacturer:
TIBB
Quantity:
341
Part Number:
ADS7830IPWR
Manufacturer:
TI
Quantity:
912
Part Number:
ADS7830IPWR
Manufacturer:
TI/德州仪器
Quantity:
20 000
Company:
Part Number:
ADS7830IPWR
Quantity:
5 000
Part Number:
ADS7830IPWT
Manufacturer:
TIBB
Quantity:
341
Part Number:
ADS7830IPWT
Manufacturer:
TI/德州仪器
Quantity:
20 000
READING DATA
Data can be read from the ADS7830 by read-addressing the
part (LSB of address byte set to 1) and receiving the
transmitted byte. Converted data can only be read from the
ADS7830 once a conversion has been initiated as described
in the preceding section.
Each 8-bit data word is returned in one byte, as shown
below, where D7 is the MSB of the data word, and D0 is the
LSB.
READING IN F/S MODE
Figure 3 describes the interaction between the master and
the slave ADS7830 in Fast or Standard (F/S) mode. At the
end of reading conversion data the ADS7830 can be issued
a repeated START condition by the master to secure bus
operation for subsequent conversions of the A/D converter.
This would be the most efficient way to perform continuous
conversions.
READING IN HS MODE
High Speed (HS) mode is fast enough that codes can be
read out one at a time. In HS mode, there is not enough time
for a single conversion to complete between the reception of
a repeated START condition and the read-addressing byte,
so the ADS7830 stretches the clock after the read-address-
ing byte has been fully received, holding it LOW until the
conversion is complete.
See Figure 4 for a typical read sequence for HS mode.
Included in the read sequence is the shift from F/S to HS
12
FIGURE 3. Typical Read Sequence in F/S Mode.
DATA
MSB
D7
NOTE: (1) To secure bus operation and loop back to the stage of write-addressing for next conversion, use repeated START.
D6
6
Sr
S
1
1
From Master to Slave
From Slave to Master
D5
5
0
0
Write-Addressing Byte
Read-Addressing Byte
D4
4
ADC Converting Mode
0
0
1
1
D3
3
ADC Power-Down Mode
0
0
D2
A 1
A 1
2
A = acknowledge (SDA LOW)
N = not acknowledge (SDA HIGH)
S = START Condition
P = STOP Condition
Sr = repeated START condition
A 0
A 0
D1
1
W
R
LSB
D0
A
A
www.ti.com
SD C 2 C 1
D 7 D 6
(depending on power-down selection bits)
modes. It may be desirable to remain in HS mode after
reading a conversion; to do this, issue a repeated START
instead of a STOP at the end of the read sequence, since a
STOP causes the part to return to F/S mode.
LAYOUT
For optimum performance, care should be taken with the
physical layout of the ADS7830 circuitry. The basic SAR
architecture is sensitive to glitches or sudden changes on the
power supply, reference, ground connections, and digital
inputs that occur just prior to latching the output of the analog
comparator. Therefore, during any single conversion for an
“n-bit” SAR converter, there are n “windows” in which large
external transient voltages can easily affect the conversion
result. Such glitches might originate from switching power
supplies, nearby digital logic, and high-power devices.
With this in mind, power to the ADS7830 should be clean and
well-bypassed. A 0.1 F ceramic bypass capacitor should be
placed as close to the device as possible. A 1 F to 10 F
capacitor may also be needed if the impedance of the
connection between +V
The ADS7830 architecture offers no inherent rejection of
noise or voltage variation in regards to using an external
reference input. This is of particular concern when the
reference input is tied to the power supply. Any noise and
ripple from the supply will appear directly in the digital results.
While high-frequency noise can be filtered out, voltage varia-
tion due to line frequency (50Hz or 60Hz) can be difficult to
remove.
The GND pin should be connected to a clean ground point.
In many cases, this will be the “analog” ground. Avoid
connections that are too near the grounding point of a
microcontroller or digital signal processor. The ideal layout
will include an analog ground plane dedicated to the con-
verter and associated analog circuitry.
D 5 D 4 D 3 D 2 D 1 D 0
Command Byte
1 x (8 Bits + not-ack)
ADC Power-Down Mode
C 0 PD 1 PD 0 X
W = '0' (WRITE)
R = '1' (READ)
ADC Sampling Mode
X
DD
N
A
and the power supply is high.
P
See Note (1)
ADS7830
SBAS302

Related parts for ADS7830I