MC6800 Motorola, MC6800 Datasheet - Page 26

• Manufacturer Part Number: MC6800
• Description: 8-BIT MICROPROCESSING UNIT (MPU)
• Manufacturer: Motorola

I
will be automatically
th$w.~ory
X during
dexed addressing
to modify
mat is illustrated
Re@ter
Index Register).
Note 1.
Note 2.
Note 3.
SwI
WA I
RTI
The operand
When
~’~i>,, ,;
,.,.!;.,...:,+
.l,*!<.
and Instructions
Address Mode
,,<.
]*;i~.?J>
(recall that the label “X”
the MPU encounters
~.~> ,:
,,:‘w:.”‘~.,~jl,
J*:\\>
program
Whil@?~$~,~PU
....,y.
-
program
If device wh.?~~ls,@dressed
Dependi,n,~ 4Q b~
Data is,@W~@
lo~@~ess
.:’>”
location
‘,$.
field can also contain
Since there are instructions
in Figure
mode provides
execution
activity.
added
specified
@
~’ .QA:.$~
BUS, RM,
t$.~
bv the MPU,
is waiting
....%
33.
capacitance,
Cycles
,$, . .J$,* .,..>
to X during
“’”
:.+;l+ , .:y
(LDX,
10
12
the LDAB
9
?
by the contents
,~
:;,*
:.$
“? ‘;’ 12
,
and Data Bus are all in the high
MOTOROLA
.>’+):$W,$
TABLE
a dynamic
is reserved to designate
for the interrupt,
CVcle
$:TO ;6:r$o
$.}
during this cycle uses VMA,
INX,
:,
#
10
a numetical
2
3
4
5
6
8
9
2
4
5
6
8
9
2
3
4
5
6
J
8
%~i>
1
7
1
3
7
1
data from the previous cycle may be retained
6 –
execution.
(Indexed)
,,{’!~$$ ;$tack Pointer – 5
DEC, etc.),
VMA
,:,,i:\$\ i?,
Line
,.::,, /.. ,:~<
$1 ‘ Stack Pointer – 6
“on the fly” way
for manipulating
INHERENT
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 >j$ ‘ :;t*,#
~ ‘..S,:...,NTY’
, .,:>,
:@~ok%~inter
of the Index
Op Code Address
Op Code Address + 1
Stack Pointer
Stack Pointer – 1
Stack Pointer
Stack Pointer – 3
Stack Pointer – 4
Stack Pointer – 5
Stack Pointer – 6 (Note 3)
Op Code Address
Op Code Address+
Stack Pointer
Stack Pointer + 1
Stack Pointer + 2
Stack Pointer + 3
Stack Pointer + 5
Stack Pointer + 6
Stack Pointer + 7
Op Code Addresq&+,t~S
Op Code Address ~{~
Stack Poi$ter
Stack ,~in~~
Sta*~hter
Stack Pointer – 7
Vector
Vector
Stack Pointer + 4
Bus Available
value that
opcode
This for-
{!,<,
.*
the in-
Pointer – 4
Address FFFA
Address FFFB
MOOE
,><~.
- ...
the
in
Address Bus
– 2
– 1
– 3
– 2
impedanca
CYCLE-BY-CYCLE
then the Data Bus will go to the high impedance
~;
will go high indicating
26
Semiconductor
,$ ~!’>i, ,;i)
.+ \ \ ..,, . . .. .
1
~;? ~...k.
,,
,,,.y;,:,~, ,,.
(Hex)
(Hex)
value to be added
when
location
required
value
represented
as in the
operand
cycle-by-cycle
ing,
,,, , .?, :*.
State.
,>;:
‘\.*: ,
the desired
of 4~.
5006, it looks
address
is equivalent
OPERATION
example.
on the Data Bus.
by a label or a numerical
the following
operation
In the
.3**:
R lx
Line
‘f$ac ~y~e~ Register from Stack (High Order
by adding
address
o
0
0
0
0
0
1
1
0
1
1
1
o
0
o
0
0
0
1
1
1
to X (5 in the example)
1
1
1,4 :#&q$
1
1
1
Products Inc.
In the
‘%ntents
.Op Code
Op Code
Op Code of Next
Op Code
.\i?... ..3:, ~ *.,
Return
Return Address (High Order Byte) ‘Q,,x,
Contents of Accumula~~.
Contents of Accurn,~taYM $:
Contents of CondF@5~,Segister
CoRW~&~ti
S*.@”
Return
Contents
Contents of Accumulator
Contents of Cond. Code Register
Address of Subroutine
Address of Subroutine
Byte)
to O, X, that is, the O may be omitted
(CONTINUED)
Index Register (Low Order By&G].;;.;” ~
Index Register (High Ord:[O &#}$
Irrelevant
lrreleva$$k~~a
Index Register from Stack ( Low Order
Byte)
Next Instruction
(High Order Byte)
Next Instruction
(Low Order Byte)
Irrelevant
Return
Index
Index Register (High Order Byte)
Irrelevant
Byte)
operand
in the next memory
for the Indexed
%ts
states of the control
is equal to X. Table
...*;,*,\,
Register (Low Order Byte)
5 to the present
earlier
,,s.
Address (Low Order Byte)
Address (Low Order BVte)
Address (High Order Byte)
,~< ~.+,>+
of Accumulator
of
of Accumulator
~ata
Data (Note 1 )
Data (Note 1 )
format,
‘..,.>
Cond. Code Register from
Accumulator
,t,\,+
.a>~+m .,
..*, i.,.:.$., ) yp
example,
Data Bus
~@te
(Note 1 )
three-state
value in the range O-255
Address from Stack
Address from Stack
Instruction
the
2)
Mode
and calculates
.’.,,,.\{..> ~,*r<,+
(High Order
(Low Order
\%*~,
location
lines: VMA
offset
~~p~ “p
B from Stack
A from Stack
A
B
Index
\.
STAA
condition.
11 shows
of Address-
“..*.,> !~{$
t:f,s : .,. ;:~;$$
Register
may
for the
X, the
is
the
the
*
be