LTC4257 LINER [Linear Technology], LTC4257 Datasheet
LTC4257
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LTC4257 Summary of contents
Page 1
... PDs. Linear Technology also provides solutions for Power Sourcing Equipment (PSE) applica- tions with quad network power controllers. The LTC4257 is available in the 8-pin SO and low profile (3mm × 3mm) DFN packages. , LTC and LT are registered trademarks of Linear Technology Corporation. ...
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... Current Accuracy During Classification 10mA < I CLASS 2 U Operating Ambient Temperature Range LTC4257C ............................................... 0°C to 70°C + 100V to V – 0.3V IN LTC4257I ............................................. –40°C to 85° – 0. Storage Temperature Range S8 Package ....................................... – 65°C to 150°C DD Package ...................................... – 65°C to 125°C Lead Temperature (Soldering, 10 sec).................. 300°C ...
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... Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltages are with respect to GND pin. Note 3: The LTC4257 operates with a negative supply voltage in the range of –1.5V to –57V. To avoid confusion, voltages in this data sheet are always referred to in terms of absolute magnitude. Terms such as “ ...
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... G01 Signature Resistance vs Input Voltage 28 ∆V V2 – V1 RESISTANCE = = ∆I I – DIODES: S1B T = 25°C A IEEE UPPER LIMIT 26 LTC4257 + 2 DIODES 25 24 LTC4257 ONLY IEEE LOWER LIMIT 23 22 V1: –1 –3 –9 –5 –7 V2: –2 –4 –6 –8 –10 INPUT VOLTAGE (V) ...
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... PWRGD (Pin 6): Power Good Output, Open-Drain. Signals that the LTC4257 MOSFET is fully on. Low impedance indicates power is good. PWRGD is high impedance during detection, classification and in the event of a (see Table 2). IN thermal overload. PWRGD is referenced (Pin 7): No Connect GND (Pin 8): Ground ...
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... LTC4257 U U APPLICATIO S I FOR ATIO The LTC4257 is intended for use as the front end of a Powered Device (PD) designed to IEEE 802.3af draft standard. The LTC4257 includes a trimmed 25k signature resistor, classification current source, and an inrush cur- rent limit circuit. With these functions integrated into the LTC4257, the signature and power interface for a PD that meets all the requirements of IEEE 802 ...
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... This identifies the device at the end of the cable as a PD. With the terminal voltage in this range, the LTC4257 connects an internal 25k resistor between GND and the V pins. This precision, temperature compensated resistor ...
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... V IN CURRENT INTERNAL TO LTC4257 4257 F03 IF PSE PROBING CURRENT < LTC4257 LOAD CURRENT, PD TERMINAL VOLTAGE IS < 15V IF PSE PROBING CURRENT > LTC4257 LOAD CURRENT, PD TERMINAL VOLTAGE IS > 20V PD Figure 4. IEEE 802.af Measured-Voltage Method of Classification Probing resistor. The resistor value CLASS CURRENT PATH PSE ...
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... GND and V pins. To control turn-on surge current in the system, OUT the LTC4257 integrates a current limit circuit with the onboard power MOSFET and sense resistor to provide a complete inrush control circuit without additional external components. The LTC4257 limits input current to less than the 400mA maximum specified by 802 ...
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... For slower rising inputs, the 350mA current limit in the LTC4257 will set the charge rate of capacitor C1. In either case, the PWRGD signal may go inactive briefly while the capacitor is charged up to the new line voltage. In the ...
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... LTC4257 reaches the overtemperature trip point. Hitting the overtemperature trip point intermittently does not harm the LTC4257, but it will delay completion of capacitor charging. Capacitors up to 200µF can be charged without a problem. ...
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... The forward voltage drop of the input diodes design subtracts from the input voltage and will affect the transition point between modes. When using the LTC4257 necessary to pay close attention to this forward voltage drop. Selection of oversized diodes will help keep the PD thresholds from exceeding IEEE specifications ...
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... ORing external power into a PD. Option 1 inserts power before the LTC4257 while options 2 and 3 insert power after the LTC4257. If power is inserted before the LTC4257 (option 1 necessary for the wall transformer to exceed the LTC4257 UVLO turn-on requirement and limit the maximum voltage to 57V ...
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... OPTION 2: AUXILIARY POWER INSERTED AFTER LTC4257 T1 D3 SMAJ58A ~ + TVS BR1 TO PHY DF01SA ~ – LTC4257 BR2 DF01SA 4 ~ – – OPTION 3: AUXILIARY POWER APPLIED TO LTC4257 AND PD LOAD T1 D3 SMAJ58A ~ + TVS BR1 TO PHY DF01SA ~ – LTC4257 BR2 DF01SA 4 ~ – 44V TO 57V – ...
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... pin should not be shorted to V CLASS CLASS force the LTC4257 classification circuit to attempt to source very large currents. In this case, the LTC4257 will quickly go into thermal shutdown (Fig- CLASS IN Power Good Interface The PWRGD signal is controlled by a high voltage, open- CLASS drain transistor ...
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... Load Capacitor IEEE 802.3af requires that the PD maintain a minimum load capacitance of 5µ permissible to have a much larger load capacitor and the LTC4257 can charge very large load capacitors before thermal issues become a problem. However, the load capacitor must not be too large or the PD design may violate two IEEE 802 ...
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... However, the pins that interface to the outside world (primarily V see peak voltages in excess of 10kV. To protect the LTC4257 highly recommended that a transient volt- age suppressor be installed between the bridge and the LTC4257 (D3 in Figure 2). LTC4257 ...
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... LTC4257 U TYPICAL APPLICATIO 18 4257fb ...
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... DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE LTC4257 .053 – .069 (1.346 – 1.752) .004 – .010 (0.101 – 0.254) .050 .014 – ...
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... IEEE 802.3af PD Interface Controller with Integrated Switching Regulator Burst Mode is a registered trademark of Linear Technology Corporation Linear Technology Corporation 20 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 ● TVS LTC4257 SMAJ58A NC GND C14 R NC CLASS 0.1µF – NC PWRGD 100V ...