LTC4308 LINER [Linear Technology], LTC4308 Datasheet - Page 9

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LTC4308

Manufacturer Part Number
LTC4308
Description
Low Voltage, Level Shifting Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery
Manufacturer
LINER [Linear Technology]
Datasheet

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OPERATION
Propagation Delays
During a rising edge, the rise time on each side is infl u-
enced by rise time acceleration, bus pull-up resistor, and
the equivalent capacitance on the line. If the pull-up resis-
tors are the same, a difference in rise time occurs which is
directly proportional to the difference in capacitance and
the presence of rise time acceleration between the two
sides. This effect is displayed in Figure 2 for V
and a 2.7k pull-up resistor on the input (V
1.8V, C
= 50pF). Since the output pin has rise time acceleration
and less capacitance than the input, it rises faster and
the effective propagation delay is negative.
There is a fi nite propagation delay through the connec-
tion circuitry for falling waveforms. Figure 3 shows the
falling edge waveforms for the same pull-up resistors and
equivalent capacitance conditions as used in Figure 2.
An external N-channel MOSFET device pulls down the
voltage on the side with 150pF capacitance; the LTC4308
pulls down the voltage on the opposite side with a delay
of 70ns. This delay is always positive and is a function of
supply voltage, temperature and the pull-up resistors and
equivalent bus capacitances on both sides of the bus.
The Typical Performance Characteristics section shows
propagation delay as a function of temperature and voltage
for 2.7k pull-up resistors and 50pF equivalent capacitance
on both sides of the part. Also, the Propagation Delay as
a function of Output Capacitance curve shows that larger
IN
Figure 2. Input-Output Rising Edge Waveforms
= 150pF) and output (V
C
V
OUT
PULLUP(OUT)
= 50pF
= V
CC
200ns/DIV
= 3.3V
C
V
IN
PULLUP(IN)
PULLUP(OUT)
= 150pF
= 1.8V
4308 F02
PULLUP(IN)
= 3.3V, C
CC
= 3.3V
OUT
=
output capacitances translate to longer delays. Users must
quantify the difference in propagation times for a rising
edge versus a falling edge in their systems and adjust
setup and hold times accordingly.
Bus Stuck Low Timeout
SDAOUT and SCLOUT are each connected to an internal
timer. When SDAOUT or SCLOUT is low, its respective
timer is started. Each timer is only reset when its pin goes
high. If the bus stuck low does not go high within 30ms
(typical), the connection circuitry is disabled, breaking
the connection between the respective input and output
pins. In addition, after at least 40μs, up to 16 clock pulses
at 8.5kHz (typical) are generated on the SCLOUT pin by
the LTC4308 in an attempt to free the stuck low bus. The
clock pulses are halted if the bus recovers to a logic high
condition before the completion of the full 16 pulses. A
stop bit is always generated on the SCLOUT and SDAOUT
pins to reset all devices on the bus.
If the stuck low SDAOUT or SCLOUT does not recover to
a logic high condition after the automatic clocking and
stop bit generation, the LTC4308 remains disconnected.
Should the bus free, the LTC4308 will reconnect the input
and output busses if a stop bit or bus idle condition is
detected, as specifi ed in the Start Up section. Alternatively,
a rising edge on ENABLE forces the connection circuitry to
reconnect the input and output busses and reset the 30ms
timer if the bus remains in a stuck bus low condition.
Figure 3. Input-Output Falling Edge Waveforms
C
V
IN
PULLUP(IN)
= 150pF
= 1.8V
200ns/DIV
C
V
OUT
PULLUP(OUT)
= 50pF
= V
CC
= 3.3V
LTC4308
4308 F03
9
4308f

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