ICS8312AYIT ICST [Integrated Circuit Systems], ICS8312AYIT Datasheet

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ICS8312AYIT

Manufacturer Part Number
ICS8312AYIT
Description
LOW SKEW, 1-TO-12 LVCMOS / LVTTL FANOUT BUFFER
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet
G
els. The low impedance LVCMOS outputs are designed to
drive 50Ω series or parallel terminated transmission lines. The
effective fanout can be increased from 12 to 24 by utilizing
the ability of the outputs to drive two series terminated lines.
The ICS8312I is characterized at full 3.3V, 2.5V, and 1.8V, or
mixed 3.3V core/2.5V, 3.3V core/1.8V and 2.5V core/1.8V out-
put operating supply modes. Guaranteed output and part-to-
part skew characteristics along with the 1.8V output capa-
bilities makes the ICS8312I ideal for high performance, single
ended applications that also require a limited output voltage.
8312AYI
B
HiPerClockS™
CLK_EN
ICS
ENERAL
LOCK
CLK
OE
The ICS8312I is a low skew, 1-to-12 LVCMOS /
LVTTL Fanout Buffer and a member of the
HiPerClockS™ family of High Performance Clock
Solutions from ICS. The ICS8312I single ended
clock input accepts LVCMOS or LVTTL input lev-
D
IAGRAM
Integrated
Circuit
Systems, Inc.
D
ESCRIPTION
nD
LE
Q
http://www.icst.com/products/hiperclocks.html
12
Q0:Q11
1
P
F
• 12 LVCMOS / LVTTL outputs
• LVCMOS / LVTTL clock input
• Maximum output frequency: 250MHz
• Output skew: 160ps (maximum)
• Operating supply modes: Core/Output
• -40°C to 85°C ambient operating temperature
IN
EATURES
CLK_EN
A
GND
GND
GND
CLK
LVCMOS / LVTTL F
V
V
SSIGNMENT
OE
DD
DD
7mm x 7mm x 1.4mm body package
1
2
3
4
5
6
7
8
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
32-Lead LQFP
ICS8312I
Y Pacakge
Top View
3.3V/3.3V
2.5V/2.5V
1.8V/1.8V
3.3V/2.5V
3.3V/1.8V
2.5V/1.8V
L
OW
S
ANOUT
ICS8312I
REV. A OCTOBER 23, 2003
KEW
24
23
22
21
20
19
18
17
, 1-
Q4
V
Q5
GND
Q6
V
Q7
GND
DDO
DDO
B
TO
UFFER
-12

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ICS8312AYIT Summary of contents

Page 1

Integrated Circuit Systems, Inc ENERAL ESCRIPTION The ICS8312I is a low skew, 1-to-12 LVCMOS / ICS LVTTL Fanout Buffer and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8312I single ended ...

Page 2

Integrated Circuit Systems, Inc ABLE IN ESCRIPTIONS ...

Page 3

Integrated Circuit Systems, Inc BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs, V -0. Package Thermal Impedance, θ JA Storage Temperature, T -65°C to 150°C STG T 4A. ...

Page 4

Integrated Circuit Systems, Inc. T 4F. LVCMOS/LVTTL DC C ABLE HARACTERISTICS ...

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Integrated Circuit Systems, Inc ABLE HARACTERISTICS ...

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Integrated Circuit Systems, Inc 3.3V±5%, V ABLE HARACTERISTICS ...

Page 7

Integrated Circuit Systems, Inc. P ARAMETER 1.65V± DDO LVCMOS GND -1.165V±5% 3.3V C /3. ORE UTPUT OAD 0.9V ± 0. DDO LVCMOS GND -0.9V ± 0.1V 1.8V C ...

Page 8

Integrated Circuit Systems, Inc. V DDO DDO sk( UTPUT KEW 80% 20% Clock t Outputs UTPUT ISE ALL IME V DDO 2 Q0:Q11 Pulse Width t PERIOD ...

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Integrated Circuit Systems, Inc. θ ABLE VS IR LOW ABLE JA θ θ θ θ θ Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use ...

Page 10

Integrated Circuit Systems, Inc ACKAGE UTLINE UFFIX ABLE ACKAGE ...

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Integrated Circuit Systems, Inc ABLE RDERING NFORMATION ...

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