AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 291

• Manufacturer Part Number: AMD-K6-2E/400AFR
• Manufacturer: AMD [Advanced Micro Devices]

22529B/0—January 2000
Table 59. Input Setup and Hold Timings for 100-MHz Bus Operation (continued)
Notes:
1. These level-sensitive signals can be asserted synchronously or asynchronously. To be sampled on a specific clock edge, setup
2. These edge-sensitive signals can be asserted synchronously or asynchronously. To be sampled on a specific clock edge, setup
Chapter 15
and hold times must be met. If asserted asynchronously, they must be asserted for a minimum pulse width of two clocks.
and hold times must be met. If asserted asynchronously, they must have been negated at least two clocks prior to assertion and
must remain asserted at least two clocks.
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
72
73
74
75
82
83
84
85
86
87
76
77
78
79
80
81
88
89
2
2
1
1
2
2
2
2
1
1
Parameter Description
INIT Setup Time
INIT Hold Time
INTR Setup Time
INTR Hold Time
INV Setup Time
INV Hold Time
KEN# Setup Time
KEN# Hold Time
NA# Setup Time
NA# Hold Time
NMI Setup Time
NMI Hold Time
SMI# Setup Time
SMI# Hold Time
STPCLK# Setup Time
STPCLK# Hold Time
WB/WT# Setup Time
WB/WT# Hold Time
Signal Switching Characteristics
3.0 ns
1.7 ns
1.0 ns
1.7 ns
1.0 ns
1.7 ns
1.0 ns
1.0 ns
1.7 ns
1.0 ns
1.7 ns
1.0 ns
1.7 ns
1.0 ns
1.7 ns
1.0 ns
1.7 ns
1.0 ns
Min
Preliminary Data
AMD-K6™-2E Processor Data Sheet
Max
Figure
93
93
93
93
93
93
93
93
93
93
93
93
93
93
93
93
93
93
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