CY7C1355C-100BZC CYPRESS [Cypress Semiconductor], CY7C1355C-100BZC Datasheet
CY7C1355C-100BZC
Related parts for CY7C1355C-100BZC
CY7C1355C-100BZC Summary of contents
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Features • Can support up to 133-MHz bus operations with zero wait states — Data is transferred on every clock • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to ...
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Selection Guide Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current Pin Configurations DDQ BYTE ...
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Pin Configurations (continued NC/576M A B NC/1G A CE2 DDQ DDQ DDQ DDQ ...
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Pin Definitions (continued) Name TQFP FBGA OE 86 CEN 52,53,56,57, M11,L11, s 58,59,62,63, K11,J11, 68,69,72,73, J10,K10, 74,75,78,79, L10,M10, 2,3,6,7, D10,E10, 8,9,12,13, F10,G10, 18,19,22,23, D11,E11, 24,25,28,29 F11,G11, D1,E1,F1, G1,D2,E2, F2,G2,J1, K1,L1,M1, J2,K2,L2 Mode 31 V 15,41,65,91 D4,D8,E4, ...
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Pin Definitions (continued) Name TQFP FBGA V 5,10,17,21, C4,C5,C6, SS 26,40,55,60, C7,C8,D5, 67,71,76,90, D6,D7,E5, E6,E7,F5, F6,F7,G5, G6,G7,H5, H6,H7,J5, J6,J7,K5,K6,K 7,L5,L6,L7,M5 ,M6,M7, N4,N8 NC 1,16,30,38,39, A1,A11,B1, 42,43,51,66,80,8 B9,B11,C1, 4,95,96 C2,C10,C11,H 1,H3,H9, H10,N1,N2, N5,N6,N7 N10,N11,P1,P 2,P5,P7, P11,R2,R5, V /DNU 14 SS Functional ...
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On the next clock rise the data presented to DQs (or a subset for Byte Write operations, see Truth Table for details) inputs is latched into the device and the write is complete. Additional accesses (Read/Write/Deselect) can be initiated on ...
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Truth Table ADRESS Operation Deselect Cycle Deselect Cycle Deselect Cycle Continue Deselect Cycle READ Cycle (Begin Burst) External READ Cycle (Continue Burst) NOP/DUMMY READ (Begin Burst) External DUMMY READ (Continue Burst) WRITE Cycle ...
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Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage on V Relative to GND........ –0.5V to +4.6V ...
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Capacitance Parameter Description C Input Capacitance IN C Clock Input Capacitance CLOCK C I/O Capacitance I/O [11] Thermal Resistance Parameters Description Θ Thermal Resistance JA (Junction to Ambient) Θ Thermal Resistance JC (Junction to Case) AC Test Loads and ...
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Switching Characteristics Over the Operating Range Parameter Set-up Times t Address Set-up before CLK Rise AS t ADV/LD Set-up before CLK Rise ALS t WE, BW Set-up before CLK Rise WES [A:D] t CEN Set-up before CLK Rise CENS t ...
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Switching Waveforms [18, 19, 20] Read/Write Waveforms CYC CLK t CENS t CENH t CH CEN t CES t CEH CE ADV/ [A: ADDRESS D(A1 ...
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Switching Waveforms (continued) [18, 19, 21] NOP, STALL and Deselect Cycles 1 2 CLK CEN CE ADV/ [A: ADDRESS D(A1) DQ COMMAND WRITE READ D(A1) Q(A2) [22, 23] ZZ Mode Timing CLK ...
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... Fine-Pitch Ball Grid Array ( 1.2 mm) CY7C1355C-133BZXI 100 CY7C1355C-100AXC 51-85050 100-Pin Thin Quad Flat Pack ( 1.4 mm) Lead-Free CY7C1355C-100BZC 51-85122 165-ball Fine-Pitch Ball Grid Array ( 1.2 mm) CY7C1355C-100BZXC CY7C1355C-100AXI 51-85050 100-Pin Thin Quad Flat Pack ( 1.4 mm) Lead-Free CY7C1355C-100BZI 51-85122 165-ball Fine-Pitch Ball Grid Array ( ...
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Package Diagrams (continued) 165-ball FBGA ( 1.2 mm) (51-85122) NoBL and No Bus Latency are trademarks of Cypress Semiconductor Corporation. ZBT is a trademark of Integrated Device Technology, Inc. All product and company names mentioned in this ...
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Document History Page Document Title: CY7C1379C 9-Mbit (256K x 32) Flow-through SRAM with NoBL™ Architecture Document Number: 38-05688 REV. ECN NO. Issue Date ** 286269 See ECN *A 320834 See ECN *B 377095 See ECN *C 408725 See ECN *D ...