HEF4510BF PHILIPS [NXP Semiconductors], HEF4510BF Datasheet - Page 2

no-image

HEF4510BF

Manufacturer Part Number
HEF4510BF
Description
BCD up/down counter
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
Philips Semiconductors
DESCRIPTION
The HEF4510B is an edge-triggered synchronous
up/down BCD counter with a clock input (CP), an up/down
count control input (UP/DN), an active LOW count enable
input (CE), an asynchronous active HIGH parallel load
input (PL), four parallel inputs (P
outputs (O
(TC), and an overriding asynchronous master reset input
(MR).
Information on P
is HIGH, independent of all other input conditions except
the MR input, which must be LOW. With PL LOW, the
counter changes on the LOW to HIGH transition of CP if
CE is LOW. UP/DN determines the direction of the count,
HIGH for counting up, LOW for counting down. When
counting up, TC is LOW when O
CE is LOW. When counting down, TC is LOW when O
O
(O
conditions.
January 1995
HEF4510BP(N):
HEF4510BD(F):
HEF4510BT(D):
( ): Package Designator North America
3
BCD up/down counter
0
and CE are LOW. A HIGH on MR resets the counter
to O
3
= LOW) independent of all other input
0
to O
3
0
), an active LOW terminal count output
Fig.2 Pinning diagram.
to P
3
16-lead DIL; plastic
16-lead DIL; ceramic (cerdip)
16-lead SO; plastic
(SOT38-1)
(SOT74)
(SOT109-1)
is loaded into the counter while PL
0
0
to P
and O
3
), four parallel
3
are HIGH and
0
to
2
PINNING
FAMILY DATA, I
See Family Specifications
PL
P
CE
CP
UP/DN
MR
TC
O
0
0
to P
to O
3
3
parallel load input (active HIGH)
parallel inputs
count enable input (active LOW)
clock pulse input (LOW to HIGH,
edge triggered)
up/down count control input
master reset input
terminal count output (active LOW)
parallel outputs
Fig.1 Functional diagram.
DD
LIMITS category MSI
Product specification
HEF4510B
MSI

Related parts for HEF4510BF