CY7C429 CYPRESS [Cypress Semiconductor], CY7C429 Datasheet - Page 9

• Manufacturer Part Number: CY7C429
• Description: 64K/128K x 9 Deep Sync FIFOs
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-06007 Rev. *B
WEN2/LD
Switching Waveforms
Notes:
15. The clocks (RCLK, WCLK) can be free-running during reset.
16. After reset, the outputs will be LOW if OE = 0 and three-state if OE=1.
17. Holding WEN2/LD HIGH during reset will make the pin act as a second enable pin. Holding WEN2/LD LOW during reset will make the pin act as a load enable for the
Reset Timing
programmable flag offset registers.
Q
EF,PAE
FF,PAF
REN1,
WEN1
0 -
REN2
RS
[ 17 ]
Q
8
[ 15 ]
(continued)
t
t
t
RSF
RSF
RSF
t
RS
t
t
t
RSS
RSS
RSS
t
t
t
RSR
RSR
RSR
OE=0
O
CY7C4281
CY7C4291
E
=1
[ 16 ]
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