74LV4051D PHILIPS [NXP Semiconductors], 74LV4051D Datasheet - Page 2

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74LV4051D

Manufacturer Part Number
74LV4051D
Description
8-channel analog multiplexer/demultiplexer
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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1.
2.
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
NOTES:
ORDERING INFORMATION
PIN CONFIGURATION
t
t
C
C
C
16-Pin Plastic DIL
16-Pin Plastic SO
16-Pin Plastic SSOP Type II
16-Pin Plastic TSSOP Type I
1998 Jun 23
PZH
PHZ
SYMBOL
Optimized for low voltage applications: 1.0 to 6.0 V
Accepts TTL input levels between V
Low typ “ON” resistance:
60 W at V
90 W at V
145 W at V
Logic level translation: to enable 3 V logic to communicate with
V analog signals
Typical “break before make” built in
Output capability: non-standard
I
8-channel analog multiplexer/demultiplexer
I
PD
S
CC
C
P
f
f
V
The condition is V
/t
/t
i
o
category: MSI
D
CC
PD
= input frequency in MHz; C
PZL
PLZ
= output frequency in MHz; C
((C
= C
is used to determine the dynamic power dissipation (P
= supply voltage in V;
L
PD
+C
cc
cc
PACKAGES
cc
amb
– V
– V
Turn “ON” time
E to V
S
Turn “OFF” time
E to V
S
Input capacitance
Power dissipation capacitance per switch
Maximum switch capacitance
independent (Y) common (Z)
S
– V
)
n
n
V
= 25 C; t
EE
EE
to V
to V
CC
EE
V
GND
CC
= 4.5 V
= 3.0 V
OS
OS
2
V
OS
OS
= 2.0 V
Y
Y
Y
Y
EE
I
Z
E
2
4
6
7
5
= GND to V
f
i
1
2
3
4
8
5
6
7
) ((C
r
f
=t
o
PARAMETER
) = sum of the outputs.
f
2.5 ns
L +
L
CC
= output load capacity in pF;
S
C
CC
= maximum switch capacitance in pF;
.
S
TEMPERATURE RANGE
SV01702
)
= 2.7 V and V
16
15
14
13
12
10
11
9
V
–40 C to +125 C
–40 C to +125 C
–40 C to +125 C
–40 C to +125 C
CC
V
Y
Y
Y
Y
S
S
S
CC
2
1
0
3
0
1
2
2
f
o
) where:
CC
= 3.6 V
C
R
V
See Notes 1 and 2
L
L
CC
= 15 pF
= 1KW
= 3.3 V
D
3
in W)
OUTSIDE NORTH AMERICA
2
DESCRIPTION
The 74LV4051 is a low-voltage CMOS device and is pin and
function compatible with the 74HC/HCT4051.
The 74LV4051 is an 8-channel analog multiplexer/demultiplexer with
three digital select inputs (S
eight independent inputs/outputs (Y
input/output (Z).
With E LOW, one of the eight switches is selected (low impedance
ON-state) by S
impedance OFF-state, independent of S
V
inputs (S
The analog inputs/outputs (Y
as a positive limit and V
exceed 6.0 V. For operation as a digital multiplexer/demultiplexer,
V
PIN DESCRIPTION
74LV4051 PW
74LV4051 DB
PIN NUMBER
3
6
7
8
11, 10, 9
13, 14, 15, 12,
1, 5, 2, 4
16
CC
EE
CONDITIONS
74LV4051 N
74LV4051 D
is connected to GND (typically ground).
and GND are the supply voltage pins for the digital control
0
to S
2
0
, and E). The V
to S
Z
E
V
GND
S
Y
V
EE
0
0
CC
SYMBOL
2.
to S
to Y
With E HIGH, all switches are in the high
EE
2
7
NORTH AMERICA
as a negative limit. V
74LV4051PW DH
0
0
74LV4051 DB
to S
74LV4051 N
74LV4051 D
to Y
CC
2
Common input/output
Enable input (active LOW)
Negative supply voltage
Ground (0 V)
Select inputs
Independent inputs/outputs
Positive supply voltage
to GND ranges are 1.0 to 6.0 V.
) an active LOW enable input (E),
7
0
and Z) can swing between V
to Y
0
TYPICAL
7
to S
) and a common
23
22
25
20
25
25
FUNCTION
3.5
5
Product specification
2
.
74LV4051
CC
853-1998 19618
- V
SOT109-1
SOT338-1
SOT403-1
SOT38-4
EE
Code
may not
UNIT
ns
ns
pF
F
CC

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