AD8332 AD [Analog Devices], AD8332 Datasheet - Page 26

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AD8332

Manufacturer Part Number
AD8332
Description
Ultralow Noise VGAs with Preamplifier and Programmable RIN
Manufacturer
AD [Analog Devices]
Datasheet

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AD8331/AD8332
+5V
200Ω
MODE
50Ω
GAIN
0.1µF
VIN
0.1µF
C
0.018µF
NC
NC
NC
NC
FB
Figure 75. Accommodating Multiple Sources
10
1
2
3
4
5
6
7
8
9
0.1µF
Figure 74. Disabling the LNA
MODE
GAIN
LMD
INH
VPS
LON
LOP
COML
VIP
VIN
18nF
AD8331
SELECTR
AD8332
LMD
COMM
COMM
INH
ENBV
VPOS
CLMP
ENBL
HILO
VOH
VCM
VOL
ADG736
FB
20
19
18
17
16
15
14
13
12
11
VOUT
LNA
+5V
280Ω
1.13kΩ
5Ω
HILO
VCM
5Ω
LON
LOP
+5V
R
CLMP
Rev. C | Page 26 of 32
MEASUREMENT CONSIDERATIONS
Figure 51 through Figure 55 show typical measurement
configurations and proper interface values for measurements
with 50 Ω conditions.
Short-circuit input noise measurements are made using
Figure 53. The input-referred noise level is determined by
dividing the output noise by the numerical gain between Point
A and Point B and accounting for the noise floor of the
spectrum analyzer. The gain should be measured at each
frequency of interest and with low signal levels since a 50 Ω
load is driven directly. The generator is removed when noise
measurements are made.
ULTRASOUND TGC APPLICATION
The AD8332 ideally meets the requirements of medical and
industrial ultrasound applications. The TGC amplifier is a key
subsystem in such applications, since it provides the means for
echolocation of reflected ultrasound energy.
Figure 76 through Figure 78 are schematics of a dual, fully
differential system using the AD8332 and AD9238 12-bit high
speed ADC with conversion speeds as high as 65 MSPS. In this
example, the VGA outputs are dc-coupled, using the reference
output of the ADC and a level shifter to center the common-
mode output voltage to match that of the converter. Consult the
data sheet of the converter to determine whether external CMV
biasing is required. AC coupling is recommended if the CMV
of the VGA and ADC are widely disparate.
Using the circuit shown, and a high speed ADC FIFO
evaluation kit connected to a laptop PC, an FFT can be
performed on the AD8332. With the on-board clock of 20 MHz,
and minimal low-pass filtering, and both channels driven with a
1 MHz filtered sine wave, the THD is –75 dB, noise floor –93 dB
and HD2 –83 dB.

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