AD9874BST AD [Analog Devices], AD9874BST Datasheet

no-image

AD9874BST

Manufacturer Part Number
AD9874BST
Description
IF Digitizing Subsystem
Manufacturer
AD [Analog Devices]
Datasheet
a
*Protected by U.S. Patent No. 5,969,657; other patents pending.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
FEATURES
10 MHz–300 MHz Input Frequency
6.8 kHz–270 kHz Output Signal Bandwidth
8.1 dB SSB NF
0 dBm IIP3
AGC Free Range up to –34 dBm
12 dB Continuous AGC Range
16 dB Front End Attenuator
Baseband I/Q 16-bit (or 24-bit) Serial Digital Output
LO and Sampling Clock Synthesizers
Programmable Decimation Factor, Output Format,
370
2.7 V–3.6 V Supply Voltage
Low Current Consumption: 20 mA
48–Lead LQFP Package (1.4 mm Thick)
APPLICATIONS
Multimode Narrowband Radio Products
Portable and Mobile Radio Products
Base Station Applications
AGC, and Synthesizer Settings
Analog/Digital UHF/VHF FDMA Receivers
TETRA, APCO25, GSM/EDGE
Input Impedance
FREF
IFIN
IOUTL
SYNC
–16dB
LNA
LO
LOOP FILTER
LO VCO AND
LOP
MXOP MXON IF2P IF2N
LON
IOUTC
FUNCTIONAL BLOCK DIAGRAM
SAMPLE CLOCK
SYNTHESIZER
LOOP FILTER
LO VCO AND
CLKP
GCP GCN
- ADC
CLKN
DAC
VREFP
GENERAL DESCRIPTION
The AD9874 is a general-purpose IF subsystem that digitizes a
low level 10 MHz–300 MHz IF input with a signal bandwidth
ranging from 6.8 kHz to 270 kHz. The signal chain of the AD9874
consists of a low noise amplifier, a mixer, a band-pass sigma-delta
analog-to-digital converter, and a decimation filter with program-
mable decimation factor. An automatic gain control (AGC) circuit
gives the AD9874 12 dB of continuous gain adjustment. Auxiliary
blocks include both clock and LO synthesizers.
The AD9874’s high dynamic range and inherent antialiasing
provided by the band-pass sigma-delta converter allow the
AD9874 to cope with blocking signals up to 95 dB stronger
than the desired signal. This attribute can often reduce the cost of
a radio by reducing its IF filtering requirements. Also, it enables
multimode radios of varying channel bandwidths, allowing the
IF filter to be specified for the largest channel bandwidth.
The SPI port programs numerous parameters of the AD9874,
thus allowing the device to be optimized for any given
application. Programmable parameters include the following:
synthesizer divide ratios; AGC attenuation and attack/decay
time; the received signal strength level; decimation factor; the
output data format; 16 dB attenuator; and the selected bias
currents. The bias currents of the LNA and mixer can be further
reduced at the expense of the degraded performance for battery-
powered applications.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
REFERENCE
VOLTAGE
DECIMATION
AGC
VCM
FILTER
VREFN
CONTROL LOGIC
PC
IF Digitizing Subsystem
FORMATTING/SSI
SPI
PD
AD9874
PE
SYNCB
© Analog Devices, Inc., 2002
DOUTA
DOUTB
FS
CLKOUT
AD9874
www.analog.com
*

Related parts for AD9874BST

Related keywords