MAX691A MAXIM [Maxim Integrated Products], MAX691A Datasheet - Page 14

• Manufacturer Part Number: MAX691A
• Description: Microprocessor Supervisory Circuits
• Manufacturer: MAXIM [Maxim Integrated Products]

parator. Select the ratio of R1 and R2 such that PFI sees
1.25V when V
Resistor R3 adds hysteresis. It will typically be an order
of magnitude greater than R1 or R2. The current
through R1 and R2 should be at least 1µA to ensure that
the 25nA (max) PFI input current does not shift the trip
point. R3 should be larger than 10kΩ to prevent it from
loading down the PFO pin. Capacitor C1 adds noise
rejection.
The power-fail comparator can be used to monitor a
negative supply voltage using Figure 12’s circuit. When
the negative supply is valid, PFO is low. When the neg-
ative supply voltage drops, PFO goes high. This cir-
cuit’s accuracy is affected by the PFI threshold
tolerance, the V
Microprocessor Supervisory Circuits
Figure 13. Maximum Transient Duration without Causing a
Reset Pulse vs. Reset Comparator Overdrive
14
______________________________________________________________________________________
100
80
60
40
20
0
10
IN
CC
Monitoring a Negative Voltage
(Reset Threshold Voltage - V
RESET COMPARATOR OVERDRIVE,
falls to the desired trip point (V
voltage, and resistors R1 and R2.
100
V
T
0.1 F CAPACITOR
FROM V
A
CC
1000
= +25°C
= 5V
CC
OUT
) (mV)
TO GND
10000
TRIP
).
The backup battery may be disconnected while V
above the reset threshold. No precautions are neces-
sary to avoid spurious reset pulses.
While issuing resets to the µP during power-up, power-
down, and brownout conditions, these supervisors are
relatively immune to short-duration, negative-going V
transients (glitches). It is usually undesirable to reset
the µP when V
Figure 13 shows maximum transient duration vs. reset-
comparator overdrive, for which reset pulses are not
generated. The graph was produced using negative-
going V
reset threshold by the magnitude indicated (reset com-
parator overdrive). The graph shows the maximum
pulse width a negative-going V
ly have without causing a reset pulse to be issued. As
the amplitude of the transient increases (i.e., goes far-
ther below the reset threshold), the maximum allowable
pulse width decreases. Typically, a V
goes 100mV below the reset threshold and lasts for
40µs or less will not cause a reset pulse to be issued.
A 100nF bypass capacitor mounted close to the V
pin provides additional transient immunity.
When OSC SEL is connected to ground, OSC IN dis-
connects from its internal 10µA (typ) pull-up and is
internally connected to a ±100nA current source.
When a capacitor is connected from OSC IN to ground
(to select alternative reset and watchdog timeout peri-
ods), the current source charges and discharges the
timing capacitor to create the oscillator that controls the
reset and watchdog timeout period. To prevent timing
errors or oscillator start-up problems, minimize external
current leakage sources at this pin, and locate the
capacitor as close to OSC IN as possible. The sum of
PC-board leakage plus OSC capacitor leakage must be
small compared to ±100nA.
Connecting a Timing Capacitor at OSC IN
CC
pulses, starting at 5V and ending below the
CC
Negative-Going V
experiences only small glitches.
Backup-Battery Replacement
CC
transient may typical-
CC
CC
Transients
transient that
CC
CC
CC
is