HI1175-EV INTERSIL [Intersil Corporation], HI1175-EV Datasheet - Page 10

• Manufacturer Part Number: HI1175-EV
• Description: 8-Bit, 20 MSPS, Flash A/D Converter
• Manufacturer: INTERSIL [Intersil Corporation]

Detailed Description
The HI1175 is a 2-step A/D converter featuring a 4-bit upper
comparator group and two lower comparator groups of 4 bits
each. The reference voltage can be obtained from the
onboard bias generator or be supplied externally. This IC
uses an offset canceling type comparator that operates syn-
chronously with an external clock. The operating modes of
the part are input sampling (S), hold (H), and compare (C).
The operation of the part is illustrated in Figure 2. A
reference voltage that is between V
applied to the upper 4-bit comparator group. V
pled with the falling edge of the first clock by the upper com-
parator block. The lower block A also samples V
same edge. The upper comparator block finalizes compari-
son data MD(1) with the rising edge of the first clock. Simul-
taneously the reference supply generates a reference
voltage RV(1) that corresponds to the upper results and
applies it to the lower comparator block A. The lower com-
parator block finalizes comparison data LD(1) with the rising
edge of the second clock. MD(1) and LD(1) are combined
and output as OUT(1) with the rising edge of the third clock.
There is a 2.5 cycle clock delay from the analog input sam-
pling point to the corresponding digital output data. Notice
how the lower comparator blocks A and B alternate generat-
ing the lower data in order to increase the overall A/D sam-
pling rate.
Test Circuits
FIGURE 21. INTEGRAL AND DIFFERENTIAL NON-LINEARITY ERROR AND OFFSET VOLTAGE TEST CIRCUIT
DVM
V
IN
RT
CLK (20MHz)
-V
RB
HI1175
+
-
DUT
is constantly
I
(1) is sam-
I
(1) on the
“0”
+V
-V
8
HI1175
4-1078
COMPARATOR
CONTROLLER
A<B
S1
A8
TO
A1
A0
S2
Power, Grounding, and Decoupling
To reduce noise effects, separate the analog and digital
grounds.
In order to avoid latchup at power up, it is necessary that
AV
Bypass both the digital and analog V
tive grounds with a ceramic 0.1 F capacitor close to the pin.
Analog Input
The input capacitance is small when compared with other
flash type A/D converters. However, it is necessary to drive
the input with an amplifier with sufficient bandwidth and drive
capability. In order to prevent parasitic oscillation, it may be
necessary to insert a low value (i.e., 0.24 ) resistor between
the output of the amplifier and the A/D input.
Reference Input
The range of the A/D is set by the voltage between V
V
V
shorting V
range of the A/D will now be from 0.6V to 2.6V and is
referred to as Self Bias Mode 1. Self Bias Mode 2 is where
V
analog input range will now be from 0V to 2.4V.
RB
RBS
RB
A>B
DD
TO
B8
B1
B0
. The internal bias generator will set V
is connected to AGND and V
S1 : ON IF A < B
S2 : ON IF A > B
and DV
to 0.6V. These can be used as the part reference by
“1”
RT
8
and V
DD
BUFFER
8
be driven from the same supply.
RTS
000 • • • 00
111 • • • 10
and V
TO
RB
RT
to V
is shorted to V
DD
RBS
pins to their respec-
. The analog input
RTS
to 2.6V and
RTS
RT
. The
and