UDA1360 PHILIPS [NXP Semiconductors], UDA1360 Datasheet
UDA1360
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UDA1360 Summary of contents
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... DATA SHEET UDA1360TS Low-voltage low-power stereo audio ADC Preliminary specification Supersedes data of 1998 Oct 02 File under Integrated Circuits, IC01 INTEGRATED CIRCUITS 2000 Feb 08 ...
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... Feb 08 GENERAL DESCRIPTION The UDA1360TS is a single chip stereo Analog-to-Digital Converter (ADC) employing bitstream conversion techniques. The low power consumption and low voltage requirements make the device eminently suitable for use in low-voltage low-power portable digital audio equipment which incorporates recording functions ...
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... VINR 13 DATAO 11 BCK 12 WS 2000 Feb 08 V DDA V SSA V ref(p) V ref( UDA1360TS ADC ( ) DECIMATION FILTER ADC ( ) DIGITAL DC-CANCELLATION INTERFACE FILTER 6 SFOR Fig.1 Block diagram. 3 Preliminary specification UDA1360TS V ref SYSCLK 14 CLOCK FSEL CONTROL 7 PWON 9 V DDD 10 V SSD MGM967 ...
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... BCK at all times for proper operation of the digital I/O data interface. 2. For MSB justified formats it is important to have a WS signal with 50% duty factor. Analog-to-Digital Converter (ADC) The stereo ADC of the UDA1360TS consists of two 3rd-order Sigma-Delta modulators. They have a modified 2000 Feb 08 handbook, halfpage s Ritchie-coder architecture in a differential switched capacitor implementation ...
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... When PWON is set to HIGH or to half the power supply, then either 6 dB gain gain in the analog front-end is selected. Application modes The UDA1360TS can be set to different modes using two 3-level pins and one 2-level pin. The selection of modes is given in Table 3. Table 3 Mode selection summary ...
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... R thermal resistance from junction to ambient th(j-a) 2000 Feb h;WS t BCK(L) t d;DAT(WS) Fig.3 Serial interface timing. CONDITIONS note 1 note 1 note 2 note 3 PARAMETER 6 Preliminary specification UDA1360TS t d;DAT t h;DAT MIN. MAX. 5.0 5.0 150 65 +125 40 +85 3000 +3000 300 +300 VALUE VALUE in free air ...
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... V DD 2000 Feb 08 CONDITIONS note 1 note 1 operation mode power-down mode operation mode power-down mode referenced to V SSA ) must be connected to the same external power supply unit Preliminary specification UDA1360TS MIN. TYP. MAX. 2.4 3.0 3.6 2.4 3.0 3.6 9 3.5 3.5 0.5 0. 0.5 DDD DDD 0.5 0.2V DDD ...
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... CONDITIONS see Table dB; A-weighted A-weighted +85 C; all voltages referenced to ground (pins 10 and 15); CONDITIONS f = 256f sys 384f sys s MSB-justified format 8 Preliminary specification UDA1360TS TYP. MAX. UNIT 1 100 MIN. ...
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Acrobat reader. white to force landscape pages to be ... LEFT BCK DATA MSB B2 WS LEFT ...
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... V SSD SFOR 6 PWON 7 V SSD SYSCLK 8 V SSD R11 47 V DDD V DDA C2 100 F ( SSD Fig.5 Application diagram. 10 Preliminary specification UDA1360TS R3 V DDA C10 47 F 100 nF ( SSA 15 V SSA FSEL DATAO ...
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... IEC SOT369-1 2000 Feb 2.5 scale (1) ( 0.32 0.25 5.30 4.5 6.6 0.65 0.20 0.13 5.10 4.3 6.2 REFERENCES JEDEC EIAJ MO-152 11 Preliminary specification UDA1360TS detail 0.75 0.65 1.0 0.2 0.13 0.45 0.45 EUROPEAN PROJECTION SOT369 ( 0.48 10 ...
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... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 12 Preliminary specification UDA1360TS ...
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... Philips for any damages resulting from such improper use or sale. 2000 Feb 08 SOLDERING METHOD WAVE not suitable (2) not suitable suitable (3)(4) not recommended (5) not recommended 13 Preliminary specification UDA1360TS (1) REFLOW suitable suitable suitable suitable suitable ...
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... Philips Semiconductors Low-voltage low-power stereo audio ADC 2000 Feb 08 NOTES 14 Preliminary specification UDA1360TS ...
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... Philips Semiconductors Low-voltage low-power stereo audio ADC 2000 Feb 08 NOTES 15 Preliminary specification UDA1360TS ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + 101 ...