DAC1408D NXP [NXP Semiconductors], DAC1408D Datasheet

DAC1408D

Manufacturer Part Number

DAC1408D

Description

JESD204A-compliant D/A conversion for wideband communication & instrumentation

Manufacturer

NXP [NXP Semiconductors]

Datasheet

1.DAC1408D.pdf (2 pages)

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

DAC1408D650HN/C1:5

Manufacturer:

Maxim

Quantity:

150

Current page: 1 of 2
Download datasheet (293Kb)

JESD204A-compliant D/A conversion for

wideband communication & instrumentation

Optimized for high-speed applications, such as 2.5/3/4G wireless, video broadcast, and

instrumentation, this advanced DAC has selectable interpolating filters and a four-lane CGV™

serial interface, and complies with the new JEDEC JESD204A.

Key features

} Dual-channel, 14 bit resolution

} 750 Msps maximum output rate

} Four-lane JEDEC204A serial digital input

} 32 bit programmable NCO frequency synthesizer

} SPI control/status interface

} HVQFN64 package

} MDS (Multi-DAC Synchronisation)

} Interpolation filters : 2x, 4x, 8x

Applications

} Wireless infrastructure: Multicarrier GSM, EDGE, CDMA,

} Multipoint communication infrastructure: LMDS/MMDS

} Broadband wireless systems

} Digital radio links

} High-speed instrumentation

} Automated Test Equipment (ATE)

} Video broadcast equipment

with low-power option

WCDMA, TD-SCDMA, WiMAX, LTE

NXP dual-channel, up to

14 bit, 750 Msps D/A converter

DAC1408D series

The NXP DAC1408D series, 14 bit digital-to-analog converters

with two channels, are equipped with interpolation filters

selectable as 2x, 4x, or 8x. It is a high-speed solution optimized

for a variety of advanced applications, including single- and

multi-carrier wireless infrastructure transmitter signals.

It uses fully configurable digital on-chip modulation to manage

I and Q inputs, up-converting them from baseband to IF. The

mixing frequency is adjusted, via an SPI (Serial Peripheral

Interface) interface with a 32 bit NCO (Numerically Controlled

Oscillator). The phase is controlled by a 16 bit register.

Supporting input data rates up to 375 Msps as well as polarity

and lane swapping, the DAC1408D series has fourlane CGV™

receivers.

CGV™ (Convertisseur Grande Vitesse) designates NXP’s

compliant, superset implementation of the JEDEC JESD204A

interface standard, with enhanced rate (4.0 Gbps typical),

enhanced reach (100 cm typical), enhanced features (multiple

DAC synchronization) and assured FPGA interoperability.

Specifically, NXP offers enhancements in terms of transceiver

Related parts for DAC1408D

DAC1408D Summary of contents

Page 1

... Interface) interface with a 32 bit NCO (Numerically Controlled Oscillator). The phase is controlled bit register. Supporting input data rates up to 375 Msps as well as polarity and lane swapping, the DAC1408D series has fourlane CGV™ receivers. CGV™ (Convertisseur Grande Vitesse) designates NXP’s compliant, superset implementation of the JEDEC JESD204A interface standard, with enhanced rate (4 ...

Page 2

... Other features include a two’s complement or binary-offset data format, and 74 dBc IMD3 at F DAC1408D series also include an LVDS compatible clock with multiplier capable of x2, x4 and x8 operation and internal regulation to adjust the output full scale current mA. ...

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