ADSP-BF525C AD [Analog Devices], ADSP-BF525C Datasheet

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ADSP-BF525C

Manufacturer Part Number
ADSP-BF525C
Description
Embedded Processor
Manufacturer
AD [Analog Devices]
Datasheet
a
Preliminary Technical Data
FEATURES
Up to 600 MHz high-performance Blackfin processor
tbd V to tbd V core V
1.8V, 2.5V, or 3.3V I/O operation
Embedded low power audio CODEC
289-ball MBGA package
MEMORY
132K bytes of on-chip memory:
External memory controller with glueless support for SDRAM
Nand flash controller
Flexible booting options from external flash, SPI and TWI
One-time programmable memory for security
Two dual-channel memory DMA controllers
Memory management unit providing memory protection
Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.
Rev. PrB
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,
RISC-like register and instruction model for ease of
Advanced debug, trace, and performance monitoring
48K bytes of instruction SRAM
16K bytes of instruction SRAM/cache
32K bytes of data SRAM
32K bytes of data SRAM/cache
4K bytes of scratchpad SRAM
and asynchronous 8-bit and 16-bit memories
memory or from SPI, TWI, and UART host devices
40-bit shifter
programming and compiler-friendly support
USB
INSTRUCTION
VOLTAGE REGULATOR
MEMORY
EXTERNAL ACCESS BUS
L1
B
DD
with on-chip voltage regulation
FLASH, SDRAM CONTROL
16
EXTERNAL PORT
MEMORY
DATA
L1
JTAG TEST AND EMULATION
DMA CORE BUS
ADSP-BF522C/ADSP-BF525C/ADSP-BF527C
CONTROLLER
CONTROLLER
INTERRUPT
Figure 1. Functional Block Diagram
PERIPHERAL ACCESS
DMA
EXTERNAL
DMA
BUS
BUS
BOOT
ROM
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
PERIPHERALS
Refer to the published ADSP-BF522/ADSP-BF525/ADSP-
CODEC FEATURES
Stereo 24-bit A/D and D/A converters
DAC
ADC
Audio sample rates
Highly efficient headphone amplifier
Complete stereo/mono or microphone/line interface
Normal and USB modes programmed under software control
Low power
Low supply voltages
BF527 Revision PrB datasheet for additional peripherals
100 dB (A-weighted) signal-to-noise ratio at 3.3 V
95 dB (A-weighted) signal-to-noise ratio at 1.8 V
90 dB (A-weighted) signal-to-noise ratio at 3.3 V
85dB (A-weighted) signal-to-noise ratio at 1.8 V
8 kHz, 44.1 kHz or 88.2 kHz–XTI/MCLK frequency 11.2896
MHz (256 × F
8 kHz, 32 kHz, 48 kHz or 96 kHz–XTI/MCLK frequency
12.288 MHz (256 × F
8 mW stereo playback (1.8 V all power supplies)
20 mW record and playback (1.8 V all power supplies))
1.8 V to 3.6 V analog supply range
1.8 V to 3.6 V digital supply range
WATCHDOG TIMER
EMAC/HDMA
TIMERS 0-7
SPORT1-0
UART 0-1
NAND
RTC
PPI
SPI
OTP
TWI
S
) or 16.9344 MHz (384 × F
Embedded Processor
© 2007 Analog Devices, Inc. All rights reserved.
S
) or 18.432 MHz (384 × F
PORTS
CODEC
S
)
Blackfin
www.analog.com
S
)
®

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ADSP-BF525C Summary of contents

Page 1

... Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. ADSP-BF522C/ADSP-BF525C/ADSP-BF527C PERIPHERALS Refer to the published ADSP-BF522/ADSP-BF525/ADSP- BF527 Revision PrB datasheet for additional peripherals ...

Page 2

... ADSP-BF522C/ADSP-BF525C/ADSP-BF527C REVISION HISTORY 6/07—Revision PrB: Changes from PrA to PrB Corrects SS/PG and VRSEL 289-Ball Mini-BGA Ball Assign- ment (Alphabetically by Signal) ................................... 7 Corrects SS/PG and VRSEL 289-Ball Mini-BGA Ball Assign- ment (Numerically by Ball Number) ............................. 8 3/07—Revision PrA: Initial Version Rev. PrB | Page June 2007 Preliminary Technical Data ...

Page 3

... The ADSP-BF522C/ADSP-BF525C/ADSP-BF527C adds a ste- reo CODEC to the standard product and changes the package labeling. STEREO CODEC The CODEC in the ADSP-BF522C/ADSP-BF525C/ADSP- BF527C is a low power, high quality stereo audio CODEC for portable digital audio application. It features two 24-bit A/D converter channels and two 24-bit D/A converter channels. ...

Page 4

... ADSP-BF522C/ADSP-BF525C/ADSP-BF527C PIN DESCRIPTIONS The ADSP-BF522C/ADSP-BF525C/ADSP-BF527C processor adds CODEC signals as listed in Table 1. Table 1. Pin Descriptions Pin Name Type Function CCLKOUT O CODEC Clock Output BCLK I/O CODEC Digital Audio Bit Clock DACDAT I CODEC DAC Sample Rate Left/Right Clock DACLRC I/O CODEC I/O DAC Sample Rate Left/Right Clock ...

Page 5

... A-weighted THD Total Harmonic Distortion 1 kHz, –5 dB, R THD Total Harmonic Distortion 1 kHz,–2 dB, R Microphone Input to Headphone Output Side Tone Mode SNR Signal to Noise Ratio ADSP-BF522C/ADSP-BF525C/ADSP-BF527C Conditions 289-Ball Chip Scale Ball Grid Array (Mini-BGA 0°C to +70°C ...

Page 6

... DAC Filter Passband Passband Passband Ripple Stopband Stopband Attenuation PACKAGE INFORMATION The information presented in Figure 3 details about the package branding for the ADSP- BF522C/ADSP-BF525C/ADSP-BF527C processor. For a com- plete listing of product availability, see Page 12. a ADSP-BF525C tppZccc vvvvvv.x n.n yyww country_of_origin B Figure 3. Product Information on Package Table 2 ...

Page 7

... GND K15 CCLKOUT D22 GND L9 CLKBUF AB19 GND L10 CLKIN R23 GND L11 CLKOUT AB18 GND L12 CMODE E22 GND L13 ADSP-BF522C/ADSP-BF525C/ADSP-BF527C Table 4 Signal Ball Signal Ball No. No. L14 PF5 B10 RESET GND L15 PF6 B12 RHPOUT GND M9 PF7 B13 RLINEIN ...

Page 8

... ADSP-BF522C/ADSP-BF525C/ADSP-BF527C Table 4. 289-Ball Mini-BGA Ball Assignment (Numerically by Ball Number) Ball Signal Ball Signal No. No. A1 GND B23 CSCL A2 PG12 C1 PG8 A3 PG13 C2 PG6 A4 PG14 C22 SDA A5 PG15 C23 CSDA A6 PPICLK/TMRCLK D1 PG4 A7 PF0 D2 PG5 A8 PF2 D22 CCLKOUT J10 GND A9 PF14 D23 CSB A10 PF15 ...

Page 9

... JMA θ JB θ BALL PAD CORNER KEY: V GND AGND DDINT V I/O V DDEXT DDMEM AVDD ADSP-BF522C/ADSP-BF525C/ADSP-BF527C Figure 5 shows the top view of the mini-BGA ball configuration. Figure 4 shows the bottom view of the mini-BGA ball configuration. Typical Unit tbd C/W tbd C/W tbd C/W tbd C/W tbd C/W ...

Page 10

... ADSP-BF522C/ADSP-BF525C/ADSP-BF527C BOTTOM VIEW Figure 5. 289-Ball Mini-BGA Ball Configuration (Bottom View) Rev. PrB | Page June 2007 Preliminary Technical Data ...

Page 11

... IPC-7351, Generic Requirements for Surface Mount Design and Land Pat- tern Standard. Table 6. BGA Data for Use with Surface Mount Design Package 289-Ball Chip Scale Package Ball Grid Array (Mini-BGA) ADSP-BF522C/ADSP-BF525C/ADSP-BF527C 289-BALL MINI BGA (BC-289-2) 0.5 BSC 12.00 BSC SQ BALL ...

Page 12

... ADSP-BF522C/ADSP-BF525C/ADSP-BF527C ORDERING GUIDE Temperature 1 Model Range ADSPBF527KBCZENGC1 0ºC to +70ºC 289-Ball Chip Scale Package Ball Grid Array 1 Referenced temperature is ambient temperature. ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR06876-0-6/07(PrB) Package Description (Mini-BGA) Rev ...

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