SAA7103 PHILIPS [NXP Semiconductors], SAA7103 Datasheet - Page 70

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SAA7103

Manufacturer Part Number
SAA7103
Description
Digital video encoder
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Philips Semiconductors
12.1
The analog output voltages are dependent on the total
load (typical value 37.5 ), the digital gain parameters and
the I
settings).
The digital output signals in front of the DACs under
nominal (nominal here stands for the settings given in
Tables 53 to 60 for example a standard PAL or NTSC
signal) conditions occupy different conversion ranges, as
indicated in Table 112 for a
Table 112 Digital output signals conversion range
12.2
Use separate ground planes for analog and digital ground.
Connect these planes only at one point directly under the
device, by using a 0
Use separate supply lines for the analog and digital supply.
Place the supply decoupling capacitors close to the supply
pins.
Use L
the decoupling capacitors to minimize radiation energy
(EMC).
2001 Sep 25
Digital settings
Digital output
Analog settings
Analog output
Digital video encoder
SET/OUT
2
C-bus settings of the DAC reference currents (analog
bead
Analog output voltages
Suggestions for a board layout
(ferrite coil) in each digital supply line close to
CVBS, SYNC TIP-TO-WHITE VBS, SYNC TIP-TO-WHITE
resistor directly at the supply stage.
see Tables 53 to 60
e.g. B DAC = 1FH
1.23 V (p-p)
100
1014
100
handbook, halfpage
colour bar signal.
FIN
Fig.16 FLTR0, FLTR1 and FLTR2 of Fig.15.
390 pF
C10
JP11
120 pF
2.7 H
see Tables 53 to 60
C16
e.g. G DAC = 1BH
FILTER 1
L2
= byp.
ll act.
70
1.00 V (p-p)
By setting the reference currents of the DACs as shown in
Table 112, standard compliant amplitudes can be
achieved for all signal combinations; it is assumed that in
subaddress 16H, parameter DACF = 0000b, that means
the fine adjustment for all DACs in common is set to 0%.
If S-video output is desired, the adjustment for the C
(chrominance subcarrier) output should be identical to the
one for VBS (luminance plus sync) output.
Place the analog coupling (clamp) capacitors close to the
analog input pins. Place the analog termination resistors
close to the coupling capacitors.
Be careful of hidden layout capacitors around the crystal
application.
Use serial resistors in clock, sync and data lines, to avoid
clock or data reflection effects and to soften data energy.
JP12
881
AGND
C13
560 pF
2.7 H
L3
MHB912
FOUT
e.g. R DAC = G DAC = B DAC = 0BH
SAA7102; SAA7103
RGB, BLACK-TO-WHITE
see Table 48
0.70 V (p-p)
876
Product specification

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