SAA7284ZP PHILIPS [NXP Semiconductors], SAA7284ZP Datasheet - Page 13

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SAA7284ZP

Manufacturer Part Number
SAA7284ZP
Description
Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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I
Table 4 Slave receiver data byte
M1/M2
This bit selects either mono channel M1 or M2 to be the
output on the left and right channel dependent on the
transmitted control bits C1 and C2 indicating a mono
transmission and the value of bit DMSEL (see Table 5).
Power-on resets to logic 1.
DMSEL
DMSEL is the dual mono selection bit, for transmissions
consisting of two independent mono signals. Selection is
in conjunction with M1/M2 (see Table 5). Power on resets
to logic 0.
SSWIT1, SSWIT2
These bits control the analog switching, selecting between
the FM, external, and NICAM signals. With the NICAM
source the signals select whether the de-emphasis is
performed and what gain is applied after the filtering and
de-emphasis stage. The signal states and their meaning
are listed in Table 7. Power-on resets to 010 with PORA
pin HIGH, and to 011 with PORA pin LOW.
PORT2
PORT2 controls a bit out, providing direct access to a
dedicated output pin (PORT2) via the I
See Table 6. Power-on resets to logic 0.
MUTEDEF
This defines the operation of the user definable MUTE pin
or MUTE I
LOW in the I
When this bit is HIGH, pulling the MUTE pin/I
LOW will mute (set to zero) the digital data and switch the
output to the FM input, depending on relevant control bits
(see Table 8). When this bit is LOW, pulling the MUTE
pin/I
the same conditions. Power-on resets to LOW.
1996 Oct 24
2
SUB-ADDRESS
C-bus slave receiver register map
Terrestrial digital sound decoder for
conventional intercarrier PLL-IF systems
2
C-bus bit LOW will only mute the digital data under
000
001
010
100
011
2
C-bus bit when it is pulled LOW externally or set
2
C-bus respectively.
AND
EMAX7
M1/M2
EMIN7
C4OV
ASYS
SSWIT3
D7
DMSEL
EMAX6
EMIN6
MUTE
BG/I
D6
2
C-bus.
SILENCE
2
SSWIT3
NICLEV
EMAX5
C-bus bit
EMIN5
D5
STLOCK
13
SSWIT2
EMAX4
EMIN4
DAIE
D4
AMDIS
This bit enables and disables the automatic mute function.
Power-on resets to enabled = LOW.
EMAX7
This is the upper error limit register which defines the
number of errors in 128 ms period which will cause
automatic mute to switch IN. User definable, but power-on
resets to 50 (HEX).
EMIN7
This is the lower error limit register which defines the
number of errors in 128 ms period which will cause
automatic mute to switch OUT. User definable, but
power-on resets to 14 (HEX).
C4OV
When set LOW this bit overrides the status of the
transmitted C4-bit when muting. When this bit is HIGH
muting takes place in accordance with EBU specification.
Power-on resets to HIGH when the PORA pin is held LOW
during power-up, and power-on resets to LOW when
PORA is HIGH.
MUTE
This reflects the function of the MUTEB pin. When this bit
is set LOW the external MUTEB pin is pulled LOW and the
action is dependent on the MUTEDEF bit (see Table 8).
Power-on resets to HIGH.
SILENCE
When set LOW this bit silences the outputs of the device
by switching the input of the audio switching buffers to
analog ground. When the PORM pin is held LOW at
power-on reset the silence bit is initialized to zero.
With PORM bit HIGH the silence bit is initialized HIGH.
TO
TO
SSWIT1
EMAX3
EMIN3
EMIN0
EMAX0
FM3
D3
EMAX2
PORT2
EMIN2
FM2
D2
Preliminary specification
MUTEDEF
EMAX1
EMIN1
FM1
D1
SAA7284
EMAX0
AMDIS
EMIN0
FM0
D0

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