ADMC328TN AD [Analog Devices], ADMC328TN Datasheet
ADMC328TN
Related parts for ADMC328TN
ADMC328TN Summary of contents
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TARGET APPLICATIONS Washing Machines, Refrigerator Compressors, Fans, Pumps, Industrial Variable Speed Drives, Automotive MOTOR TYPES Permanent Magnet Synchronous Motors (PMSM) Brushless DC Motors (BDCM) FEATURES 20 MIPS Fixed-Point DSP Core Single Cycle Instruction Execution (50 ns) ADSP-21xx Family Code ...
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ADMC328–SPECIFICATIONS ANALOG-TO-DIGITAL CONVERTER Parameter Signal Input 1 Resolution 2 Linearity Error 2 Zero Offset Channel-to-Channel Comparator Match Comparator Delay 2 ADC Hi-Level Input Current 2 ADC Lo-Level Input Current NOTES 1 Resolution varies with PWM switching frequency (double update mode) ...
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VOLTAGE REFERENCE Parameter Voltage Level (V ) REF Output Voltage Drift NOTES 1 This specification for voltage level ( for SOIC package only, at specified temperature range. REF Specifications subject to change without notice. I AMPLIFIER–TRIP SENSE Parameter ...
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ADMC328 TIMING PARAMETERS Parameter Clock Signals Signal t is defined as 0 The ADMC328 uses an input clock with a CK CKIN frequency equal to half the instruction rate MHz input clock (which is equivalent to ...
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Parameter Serial Ports Timing Requirements: t SCLK Period SCK t DR/TFS/RFS Setup before SCLK Low SCS t DR/TFS/RFS Hold after SCLK Low SCH t SCLK Width SCP IN Switching Characteristics: t CLKOUT High to SCLK CC t SCLK High to ...
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... C to +105 C ADMC328TR-xxx-yy – +125 C ADMC328YN-xxx-yy – +105 C ADMC328TN-xxx-yy – +125 C NOTES xxx = customer identification code ROM identification code. To place an order for a custom ROM-coded ADMC328 processor, please request a copy of the ADMC ROM ordering package, available from your Analog Devices Sales representative ...
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GENERAL DESCRIPTION The ADMC328 is a low cost, single-chip DSP-based controller, suitable for permanent magnet synchronous motors and brushless dc motors. The ADMC328 integrates a 20 MIPS, fixed-point DSP core with a complete set of motor control and system peripherals ...
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ADMC328 DSP CORE ARCHITECTURE OVERVIEW Figure overall block diagram of the DSP core of the ADMC328, which is based on the fixed-point ADSP-2171. The flexible architecture and comprehensive instruction set of the ADSP-2171 allow the processor to ...
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Serial Port The ADMC328 incorporates a complete synchronous serial port (SPORT1) for serial communication and multiprocessor communication. The following is a brief list of capabilities of the ADMC328 SPORT1. Refer to the ADSP-2100 Family User’s Manual, Third Edition, for further ...
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ADMC328 SYSTEM INTERFACE Figure 4 shows a basic system configuration for the ADMC328 with an external crystal. CLKOUT XTAL 10MHz CLKIN ADMC328 RESET Figure 4. Basic System Configuration Clock Signals The ADMC328 can be clocked either by a crystal or ...
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In addition, high frequency chopping can be independently enabled for the high side and the low side outputs using separate control bits in the PWMGATE register. The PWM generator is capable of operating in two distinct ...
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ADMC328 Three-Phase Timing Unit The 16-bit three-phase timing unit is the core of the PWM con- troller and produces three pairs of pulsewidth modulated signals with high resolution and minimal processor overhead. There are four main configuration registers (PWMTM, PWMDT, ...
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Width of the PWMSYNC Pulse: PWMSYNCWT Register The PWM controller of the ADMCF328 produces an internal PWM synchronization pulse at a rate equal to the PWM switching frequency in single update mode and at twice the PWM frequency in the ...
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ADMC328 PWMCHA PWMCHA 1 PWMTM PWMTM 1 PWMDT PWMDT 1 – PWMTM PWMTM PWMTM PWMTM 1 PWMTM PWMTM 1 PWCHA PWMDT 2 PWMTM PWMTM 1 because for ...
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Pin AH. Following a reset, the three crossover bits are cleared so that the crossover mode is disabled on all three pairs of PWM signals. The PWMSEG register also contains ...
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ADMC328 Table V. Fundamental Characteristics of PWM Generation Unit of ADMC328 16-BIT PWM TIMER Parameter Counter Resolution Edge Resolution (Single Update Mode) Edge Resolution (Double Update Mode) Programmable Dead Time Range Programmable Dead Time Increments Programmable Pulse Deletion Range Programmable ...
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Following reset This reset and the start of the C conversion process are initiated by the PWMSYNC pulse, as shown in Figure 12. The width of the PWMSYNC pulse is controlled by the ...
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ADMC328 Programmable Current Source The ADMC328 has an internal current source that is used to charge an external capacitor, generating the voltage ramp used for conversion. The magnitude of the output of the current source circuit is subject to manufacturing ...
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UPPER DIODE CONDUCTION LOWER TRANSISTOR LOWER TRANSISTOR V WINDING CONDUCTION CONDUCTION I WINDING I BUS PWMSYNC Figure 17. Bus Current Signals ADC Registers The configuration of all registers of the ADC System is shown at the end of the data ...
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ADMC328 Parameter Resolution PWM Frequency PWM DAC Equation The auxiliary PWM output can be filtered in order to produce a low frequency analog signal between 2-pole filter with a 1.2 kHz cutoff frequency will sufficiently at- ...
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When the DRIB data receive line of SPORT1 is selected as the data receive line (MODECTRL [4] = 1), the PIO4/DRIA line may be used as a general purpose PIO pin. When the DRIA data receive line of SPORT1 is ...
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ADMC328 SYSTEM CONTROLLER The system controller block of the ADMC328 performs the fol- lowing functions: 1. Manages the interface and data transfer between the DSP core and the motor control peripherals. 2. Handles interrupts generated by the motor control periph- ...
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Address (HEX) Name 0x2000 ADC1 0x2001 ADC2 0x2002 ADC3 0x2003 ADCAUX 0x2004 PIODIR0 0x2005 PIODATA0 0x2006 PIOINTEN0 0x2007 PIOFLAG0 0x2008 PWMTM 0x2009 PWMDT 0x200A PWMPD 0x200B PWMGATE 0x200C PWMCHA 0x200D PWMCHB 0x200E PWMCHC 0x200F PWMSEG 0x2010 AUXCH0 0x2011 AUXCH1 0x2012 ...
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ADMC328 CHANNEL CROSSOVER CROSSOVER B CHANNEL CROSSOVER 1 = CROSSOVER C CHANNEL CROSSOVER Default bit values are shown; ...
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LOW SIDE GATE CHOPPING 0 = DISABLE 1 = ENABLE HIGH SIDE GATE CHOPPING Figure 22. Configuration of Additional ...
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ADMC328 ...
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Figure 24. Configuration of Additional PIO Registers Default bit values are shown value is ...
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ADMC328 Default bit values are shown ...
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Figure 26. Configuration of Additional AUX Registers Default bit values are shown value is shown, the bit field is undefined at ...
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ADMC328 OFFSET MODE AUXILIARY 1 = INDEPENDENT MODE PWM SELECT ADC 0 = CLKIN RATE COUNTER 1 = CLKOUT RATE SELECT 1ST HALF OF ...
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DISABLE 1 = ENABLE 15 0 INTERRUPT FORCE IRQ2 SOFTWARE 1 SOFTWARE 0 SPORT1 TRANSMIT OR IRQ1 SPORT1 RECEIVE OR IRQ0 TIMER PERIPHERAL (OR IRQ2 DISABLE (MASK) 1 ...
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ADMC328 0 = DISABLED SPORT1 ENABLE 1 = ENABLED Default bit values are shown value is shown, the bit field is undefined at reset. Reserved bits are shown on a gray field. PIN 1 0.250 (6.35) MAX 0.200 ...