MPC801KG BURR-BROWN [Burr-Brown Corporation], MPC801KG Datasheet - Page 7

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MPC801KG

Manufacturer Part Number
MPC801KG
Description
High Speed CMOS ANALOG MULTIPLEXER
Manufacturer
BURR-BROWN [Burr-Brown Corporation]
Datasheet

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MPC801KG
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780
a 20Vp-p, 1000Hz sine wave applied to all OFF channels.
The crosstalk for these multiplexers is shown in the Typical
Performance Curves.
COMMON-MODE REJECTION
(Differential Mode Only)
The matching properties of the load, multiplexer and source
affect the common-mode rejection (CMR) capability of a
differentially multiplexed system. CMR is the ability of the
multiplexer and input amplifier to reject signals that are
common to both inputs, and to pass on only the signal
difference to the output. Protection is provided for common-
mode signals of 2V above the power supply voltages with
no damage to the analog switches.
The CMR of the MPC801 and Burr-Brown’s model 3630
instrumentation amplifier is 120dB at DC to 10Hz with a
6dB/octave rolloff to 80dB at 1000Hz. This measurement of
CMR is shown in the Typical Performance Curves and is
made with a Burr-Brown model 3630 instrumentation am-
plifier connected for a gain of 1000 and with source unbal-
ance of 10k , 1k
Factors which will degrade multiplexer and system DC
CMR are:
AC CMR rolloff is determined by the amount of common-
mode capacitances (absolute and mismatch) from each sig-
nal line to ground. Larger capacitances will limit CMR at
higher frequencies; thus, if good CMR is desired at higher
frequencies, the common-mode capacitances and unbalance
of signal lines and multiplexer to amplifier wiring must be
minimized. Use twisted-shielded pair signal lines wherever
possible.
INSTALLATION AND
OPERATING INSTRUCTIONS
The ENABLE input, pin 12, is included for expansion of the
number of channels on a single-node as illustrated in Figure
5. With the ENABLE line at a logic 1, the channel is selected
by the Channel Select Address (shown in the Truth Tables).
If ENABLE is at logic 0, all channels are turned OFF, even
if the Channel Address Lines are active. If the ENABLE line
is not to be used, simply tie it to logic 1.
For the best settling time, the input wiring and interconnec-
tions between multiplexer output and driven devices should
be kept as short as possible. When driving the digital inputs
from TTL, open collector output with pullup resistors are
recommended.
To preserve common-mode rejection of the MPC801, use
twisted-shielded pair wire for signal lines and inter-tier
connections and/or multiplexer output lines. This will help
• Amplifier bias current and differential impedance mis-
• Load impedance mismatch.
• Multiplexer impedance and leakage current mismatch.
• Load and source common-mode impedance.
match.
and no unbalance.
7
common-mode capacitance balance and reduce stray signal
pickup. If shields are used, all shields should be connected
as close as possible to system analog common or to the
common-mode guard driver.
LOGIC LEVELS
The logic level is user-programmable as either TTL-compat-
ible by leaving the V
by connecting the V
16-CHANNEL SINGLE-ENDED OPERATION
To use the MPC801 as a 8-channel single-ended multi-
plexer, output A (pin 18) is connected to output B (pin 2) to
form a single output, then all three address lines (A
A
The MPC801 can also be used as a dual channel single-
ended multiplexer by not connecting output A and B, but
then only one channel in one of the multiplexers can be
addressed at a time.
8-CHANNEL DIFFERENTIAL OPERATION
To use the MPC801 as an 4-channel differential multiplexer,
connect address line A
two address lines (A
The differential inputs are the pairs of A
etc.
TRUTH TABLES
MPC801 used as an 8-channel single-ended multiplexer or
4-channel dual multiplexer.
MPC801 used as a 4-channel differential multiplexer.
For 8-channel single-ended function, tie “out A” to “out B”, for dual
4-channel function use the A
MUX B, where MUX A is selected with A
ENABLE
2
) are used to address the correct channel.
ENABLE
USE A
H
H
H
H
H
H
H
H
L
H
H
H
H
L
2
A
AS DIGITAL ADDRESS INPUT
2
CONNECT TO –V
A
H
H
H
H
X
L
L
L
L
2
A
H
X
H
L
L
1
0
REF
, and A
REF
A
X
H
H
H
H
to V
L
L
L
L
2
2
(pin 8) open, or CMOS-compatible
1
address pin to select between MUX A and
CC
to –V
1
) to address the correct channel.
DD
A
X
H
H
L
L
0
(CMOS supply voltage).
MPC801
CC
2
A
H
H
H
H
X
L
L
L
L
low.
0
then use the remaining
OUT A
“ON” CHANNEL TO
None
1
“ON” CHANNEL TO
1A
2A
3A
4A
OUT A
and B
None
None
None
None
None
1A
2A
3A
4A
1
, A
0
OUT B
2
None
, A
OUT B
None
None
None
None
None
and B
1B
2B
3B
4B
1B
2B
3B
4B
1
and
2
,
®

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