PIC12F683-E/MD MICROCHIP [Microchip Technology], PIC12F683-E/MD Datasheet - Page 12

• Manufacturer Part Number: PIC12F683-E/MD
• Description: 8-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC12F683
TABLE 2-2:
DS41211D-page 10
Addr
Bank 1
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah PCLATH
8Bh INTCON
8Ch PIE1
8Dh
8Eh PCON
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah EEDAT
9Bh EEADR
9Ch EECON1
9Dh EECON2
9Eh ADRESL
9Fh
Legend:
Note 1:
INDF
OPTION_REG
PCL
STATUS
FSR
TRISIO
OSCCON
OSCTUNE
PR2
WPU
IOC
VRCON
ANSEL
2:
3:
Name
(3)
—
—
—
—
—
—
—
—
—
—
– = unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition,
shaded = unimplemented
IRP and RP1 bits are reserved, always maintain these bits clear.
OSTS bit of the OSCCON register reset to ‘0’ with Dual Speed Start-up and LP, HS or XT selected as the oscillator.
GP3 pull-up is enabled when MCLRE is ‘1’ in the Configuration Word register.
PIC12F683 SPECIAL FUNCTION REGISTERS SUMMARY BANK 1
Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx 17, 90
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Timer2 Module Period Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
EEPROM Control Register 2 (not a physical register)
Least Significant 2 bits of the left shifted result or 8 bits of the right shifted result
EEADR7
EEDAT7
GPPU
VREN
IRP
EEIE
Bit 7
GIE
—
—
—
—
—
—
—
—
—
(1)
INTEDG
EEADR6
EEDAT6
ADCS2
RP1
IRCF2
PEIE
ADIE
Bit 6
—
—
—
—
—
—
—
—
(1)
ULPWUE SBOREN
EEADR5
TRISIO5
CCP1IE
EEDAT5
ADCS1
IRCF1
WPU5
T0CS
IOC5
Bit 5
T0IE
VRR
RP0
—
—
—
Write Buffer for upper 5 bits of Program Counter
EEADR4
TRISIO4
EEDAT4
ADCS0
IRCF0
WPU4
T0SE
TUN4
IOC4
INTE
Bit 4
TO
—
—
—
EEADR3
TRISIO3
OSTS
EEDAT3
WRERR
TUN3
ANS3
CMIE
GPIE
IOC3
Bit 3
PSA
VR3
PD
—
—
(2)
EEADR2
TRISIO2
EEDAT2
WREN
OSFIE
WPU2
TUN2
ANS2
IOC2
Bit 2
T0IF
HTS
PS2
VR2
—
Z
EEADR1
TRISIO1
TMR2IE
EEDAT1
WPU1
TUN1
ANS1
IOC1
Bit 1
INTF
POR
PS1
VR1
LTS
WR
DC
© 2007 Microchip Technology Inc.
TRISIO0 --11 1111 32, 90
EEADR0 0000 0000 71, 90
TMR1IE 000- 0000 14, 90
EEDAT0 0000 0000 71, 90
WPU0
TUN0
ANS0
GPIF
IOC0
Bit 0
BOR
SCS
VR0
PS0
RD
C
1111 1111 12, 90
0000 0000 17, 90
0001 1xxx 11, 90
xxxx xxxx 17, 90
---0 0000 17, 90
0000 0000 13, 90
--01 --qq 16, 90
-110 x000 20, 90
---0 0000 24, 90
1111 1111 49, 90
--11 -111 34, 90
--00 0000 34, 90
0-0- 0000 58, 90
---- x000 72, 91
---- ---- 72, 91
xxxx xxxx 66, 91
-000 1111 33, 91
POR, BOR
Value on
—
—
—
—
—
—
—
—
—
—
Page
—
—
—
—
—
—
—
—
—
—