PIC12F683-E/MD MICROCHIP [Microchip Technology], PIC12F683-E/MD Datasheet - Page 33

• Manufacturer Part Number: PIC12F683-E/MD
• Description: 8-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

4.0
There are as many as six general purpose I/O pins
available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
4.1
GPIO is a 6-bit wide, bidirectional port. The
corresponding data direction register is TRISIO.
Setting a TRISIO bit (= 1) will make the corresponding
GPIO pin an input (i.e., put the corresponding output
driver in a High-Impedance mode). Clearing a TRISIO
bit (= 0) will make the corresponding GPIO pin an
output (i.e., put the contents of the output latch on the
selected pin). An exception is GP3, which is input only
and its TRISIO bit will always read as ‘1’. Example 4-1
shows how to initialize GPIO.
Reading the GPIO register reads the status of the pins,
whereas writing to it will write to the PORT latch. All
write operations are read-modify-write operations.
REGISTER 4-1:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
U-0
—
GPIO PORT
GPIO and the TRISIO Registers
Unimplemented: Read as ‘0’
GP<5:0>: GPIO I/O Pin bit
1 = Port pin is > V
0 = Port pin is < V
U-0
—
GPIO: GENERAL PURPOSE I/O REGISTER
W = Writable bit
‘1’ = Bit is set
IH
IL
R/W-x
GP5
R/W-0
GP4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Therefore, a write to a port implies that the port pins are
read, this value is modified and then written to the
PORT data latch. GP3 reads ‘0’ when MCLRE = 1.
The TRISIO register controls the direction of the GPIO
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISIO register
are maintained set when using them as analog inputs.
I/O pins configured as analog input always read ‘0’.
EXAMPLE 4-1:
GP3
R-x
Note:
BANKSEL GPIO
CLRF
MOVLW
MOVWF
BANKSEL ANSEL
CLRF
MOVLW
MOVWF
The ANSEL and CMCON0 registers must
be initialized to configure an analog
channel as a digital input. Pins configured
as analog inputs will read ‘0’.
GPIO
07h
CMCON0
ANSEL
0Ch
TRISIO
R/W-0
GP2
INITIALIZING GPIO
;
;Init GPIO
;Set GP<2:0> to
;digital I/O
;
;digital I/O
;Set GP<3:2> as inputs
;and set GP<5:4,1:0>
;as outputs
x = Bit is unknown
PIC12F683
R/W-0
GP1
DS41211D-page 31
R/W-0
GP0
bit 0