HD6417606 RENESAS [Renesas Technology Corp], HD6417606 Datasheet - Page 184

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HD6417606

Manufacturer Part Number
HD6417606
Description
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 7 Bus State Controller (BSC)
Table 7.11 Relationship between Register Settings and Address Multiplex Output (2)
Conditions: One 64-Mbit product (1 Mword x 16 bits x 4 banks, 8-bit column product) is
Notes: 1. L/H is a bit used in the command specification; it is fixed low or high according to the
Rev. 4.00 Sep. 13, 2007 Page 158 of 502
REJ09B0239-0400
Pins of this LSI
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
2. Bank address specification
access mode.
connected with A3BSZ[1:0] = 10 (16-bit data bus width), A3ROW[1:0] = 01 (12-bit
row address), and A3COL[1:0] = 00 (8-bit column address).
Output Row
Address
A25
A24
A23
A22*
A21*
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
2
2
Output Column
Address
A17
A16
A15
A22*
A21*
A12
L/H*
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1
2
2
Pins of SDRAM Function
A13 (BA1)
A12 (BA0)
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Unused
Specifies bank
Address
Specifies
address/precharge
Address
Unused

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