ADG701BRT AD [Analog Devices], ADG701BRT Datasheet - Page 8

• Manufacturer Part Number: ADG701BRT
• Description: CMOS Low Voltage 2ohm SPST Switches
• Manufacturer: AD [Analog Devices]

ADG701/ADG702
APPLICATIONS INFORMATION
The ADG701/ADG702 belongs to Analog Devices’ new fam-
ily of CMOS switches. This series of general purpose switches
have improved switching times, lower on resistance, higher
bandwidth, low power consumption and low leakage currents.
ADG701/ADG702 Supply Voltages
Functionality of the ADG701/ADG702 extends from +1.8 V to
+5.5 V single supply, which makes it ideal for battery powered
instruments, where important design parameters are power
efficiency and performance.
It is important to note that the supply voltage effects the input
signal range, the on resistance and the switching times of the
part. By taking a look at the typical performance characteristics
and the specifications, the effects of the power supplies can be
clearly seen.
For V
temperature range.
On Response vs. Frequency
Figure 7 illustrates the parasitic components that affect the ac
performance of CMOS switches (the switch is shown surrounded
by a box). Additional external capacitances will further degrade
some performance. These capacitances affect feedthrough,
crosstalk and system bandwidth.
The transfer function that describes the equivalent diagram of
the switch (Figure 7) is of the form (A)s shown below.
where:
Figure 7. Switch Represented by Equivalent Parasitic
Components
C
R
T
T
0.006 (0.15)
0.002 (0.05)
= C
= R
V
DD
0.122 (3.10)
0.114 (2.90)
IN
SEATING
S
= +1.8 V operation, R
LOAD
LOAD
PLANE
PIN 1
0.0256 (0.65) BSC
/(R
+ C
0.122 (3.10)
0.114 (2.90)
0.120 (3.05)
0.112 (2.84)
8
1
0.018 (0.46)
0.008 (0.20)
LOAD
D
A(s)
R
C
+ C
ON
DS
5
4
+ R
DS
8-Lead SOIC
0.199 (5.05)
0.187 (4.75)
C
R
ON
0.043 (1.09)
0.037 (0.94)
D
T
(RM-8)
)
s(R
ON
s(R
is typically 40
ON
0.011 (0.28)
0.003 (0.08)
C
ON
LOAD
D
C
C
T
DS
R
T
) 1
0.120 (3.05)
0.112 (2.84)
33°
27°
) 1
R
LOAD
Dimensions shown in inches and (mm).
0.028 (0.71)
0.016 (0.41)
over the
OUTLINE DIMENSIONS
V
OUT
–8–
The signal transfer characteristic is dependent on the switch
channel capacitance, C
zero in the numerator of the transfer function A(s). Because the
switch on resistance is small, this zero usually occurs at high
frequencies. The bandwidth is a function of the switch output
capacitance combined with C
frequency pole corresponding to these capacitances appears in
the denominator of A(s).
The dominant effect of the output capacitance, C
pole breakpoint frequency to occur first. Therefore, in order to
maximize bandwidth a switch must have a low input and output
capacitance and low on resistance. The On Response vs. Fre-
quency plot for the ADG701/ADG702 can be seen in Figure 6.
Off Isolation
Off isolation is a measure of the input signal coupled through an
off switch to the switch output. The capacitance, C
the input signal to the output load, when the switch is off, as
shown in Figure 8.
Figure 8. Off Isolation Is Affected by External Load Resis-
tance and Capacitance
The larger the value of C
produced. The typical performance characteristic graph of Fig-
ure 5 illustrates the drop in off-isolation as a function of fre-
quency. From dc to roughly 1 MHz, the switch shows better
than –75 dB isolation. Up to frequencies of 10 MHz, the off
isolation remains better than –55 dB. As the frequency increases,
more and more of the input signal is coupled through to the
output. Off-isolation can be maximized by choosing a switch
with the smallest C
and capacitance affect off isolation also, as they contribute to
the coefficients of the poles and zeros in the transfer function of
the switch when open.
0.051 (1.30)
0.035 (0.90)
0.071 (1.80)
0.059 (1.50)
V
IN
0.006 (0.15)
0.000 (0.00)
PIN 1
S
6-Lead Plastic Surface Mount (SOT-23)
1
6
0.122 (3.10)
0.106 (2.70)
0.075 (1.90)
DS
BSC
C
5
2
DS
A(s)
as possible. The values of load resistance
0.020 (0.50)
0.010 (0.25)
DS
DS
. This capacitance creates a frequency
4
3
C
, larger values of feedthrough will be
D
0.037 (0.95) BSC
(RT-6)
DS
s(R
0.118 (3.00)
0.098 (2.50)
0.057 (1.45)
0.035 (0.90)
s(R
SEATING
PLANE
and the load capacitance. The
LOAD
LOAD
C
LOAD
D
)(C
C
0.009 (0.23)
0.003 (0.08)
T
DS
) 1
)
R
LOAD
10
0
D
, causes the
DS
, couples
0.022 (0.55)
0.014 (0.35)
REV. A
V
OUT