LT3460ES5 LINER [Linear Technology], LT3460ES5 Datasheet - Page 4

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LT3460ES5

Manufacturer Part Number
LT3460ES5
Description
1.3MHz Step-Up DC/DC Converter in SC70 and ThinSOT
Manufacturer
LINER [Linear Technology]
Datasheet

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PI FU CTIO S
OPERATIO
The LT3460 uses a constant frequency, current mode
control scheme to provide excellent line and load regula-
tion. Operation can be best understood by referring to the
block diagram in Figure 1. At the start of each oscillator
cycle, the SR latch is set, which turns on the power switch
Q1. A voltage proportional to the switch current is added
to a stabilizing ramp and the resulting sum is fed into the
positive terminal of the PWM comparator A2. When this
voltage exceeds the level at the negative input of A2, the SR
LT3460
SW (Pin 1/Pin 1): Switch Pin. Connect inductor/diode
here. Minimize trace at this pin to reduce EMI.
GND (Pin 2/Pins 2 and 5): Ground Pin. Tie directly to local
ground plane.
FB (Pin 3/Pin 3): Feedback Pin. Reference
voltage is 1.255V. Connect resistor divider tap here.
Minimize trace area at FB. Set V
V
4
BLOCK DIAGRA
OUT
(PIN 6 SC70 PACKAGE)
SHUTDOWN
R
U
S
, C
= 1.255V (1 + R1/R2).
S
OPTIONAL SOFT-START COMPONENTS
U
R
V
S
OUT
(EXTERNAL)
R1 (EXTERNAL)
R2 (EXTERNAL)
V
FB
IN
U
5
U
4
C
S
REFERENCE
(EXTERNAL)
SHDN
1.255V
W
(ThinSOT/SC70 Packages)
3
FB
+
OUT
A1
according to
Figure 1. Block Diagram
GENERATOR
OSCILLATOR
R
1.3MHz
C
RAMP
C
C
+
COMPARATOR
A2
latch is reset turning off the power switch. The level at the
negative input of A2 is set by the error amplifier A1, and is
simply an amplified version of the difference between the
feedback voltage and the reference voltage of 1.255V. In
this manner, the error amplifier sets the correct peak
current level to keep the output in regulation. If the error
amplifier’s output increases, more current is delivered to
the output; if it decreases, less current is delivered.
SHDN (Pin 4/Pin 4): Shutdown Pin. Tie to 1.5V or higher
to enable device; 0.4V or less to disable device. Also
functions as soft-start. Use RC filter (47k, 47nF typ) as
shown in Figure 1.
V
bypassed.
IN
(Pin 5/Pin 6): Input Supply Pin. Must be locally
R
S
Q
DRIVER
+
1
2
Q1
0.1
SW
GND
(PINS 2 AND 5 SC70 PACKAGE)
3460 BD
3460f

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