OPA642N BURR-BROWN [Burr-Brown Corporation], OPA642N Datasheet - Page 13

• Manufacturer Part Number: OPA642N
• Description: Wideband, Low Distortion, Low Gain OPERATIONAL AMPLIFIER
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

closest integer for minimum noise figure. This optimum
turns ratio is calculated by
This optimum will depend strongly on the amplifier and
configuration selected.
FIGURE 7. Reduced Noise Figure Circuit.
DC OFFSET CONTROL
The OPA642 can provide excellent DC signal accuracy due
to its high open-loop gain, high common-mode rejection,
high power supply rejection, and low input offset voltage
and bias current offset errors. The high grade (B) version of
any package type provides less than 1mV input offset
voltage. To take full advantage of this low input offset
voltage, a careful attention to input bias current cancellation
is also required. The high speed input stage for the OPA642
has a relatively high input bias current (25 A typ into the
pins) but with a very close match between the two input
currents—typically 100nA input offset current. The total
output offset voltage may be considerably reduced by match-
ing the source impedances looking out of the two inputs. For
example, one way to add bias current cancellation to the
circuit of Figure 1 would be to insert a 175
into the non-inverting input from the 50 terminating resis-
tor. When the 50
increase the source impedance for the non-inverting input
bias current to 200 . Since this is now equal to the imped-
ance looking out of the inverting input (R
will cancel the gains for the bias currents to the output
leaving only the offset current times the feedback resistor as
a residual DC error term at the output. Using a 402
feedback resistor, this output error will now be less than 3 A
• 402
A fine scale output offset null, or DC operating point
adjustment, is sometimes required. Numerous techniques
are available for introducing a DC offset control into an op
amp circuit. Most of these techniques eventually reduce to
setting up a DC current through the feedback resistor. One
key consideration to selecting a technique is to insure that it
has a minimal impact on the desired signal path frequency
response. If the signal path is intended to be non-inverting,
Noise Figure
6.3dB
R
N
S
= 50
OPT
= 1.2mV.
Nearest Integer
1:7
source resistor is DC coupled, this will
2.4k
A
V
= 7V/V [16.9dB]
402
E
N
OPA642
/ I
402
Supply Decoupling
BN
Not Shown
F
|| R
R
series resistor
G
S
), the circuit
/ 2
50
Load
50
Eq. 4
13
the offset control is best applied as an inverting summing
signal. If the signal path is intended to be inverting, applying
the offset control to the non-inverting input can be consid-
ered. For a DC coupled signal, the DC offset signal can, in
some configurations, set up a DC current back into the
source that must be considered. An adjustment placed on the
inverting op amp input can also change the noise gain and
frequency response flatness. Figure 8 shows one example of
an offset adjustment for a DC coupled signal path that will
have minimum impact on the signal frequency response. In
this case, the input is brought in to an inverting gain resistor
with the DC adjustment an additional current summed into
the inverting node. The resistor network setting this current
is much larger than the signal path resistors. This will insure
that this adjustment has minimal impact on the loop gain and
hence the frequency response.
FIGURE 8. DC Coupled, Inverting Gain of –2, with Output
THERMAL ANALYSIS
The OPA642 will not require heatsinking under most oper-
ating conditions. Maximum desired junction temperature
will set a maximum allowed internal power dissipation as
described below. In no case should the maximum junction
temperature be allowed to exceed 175 C.
Operating junction temperature (T
T
sum of quiescent power (P
pated in the output stage (P
Quiescent power is simply the specified no-load supply
current times the total supply voltage across the part. P
will depend on the required output signal and load but
would, for a grounded resistive load, be at a maximum when
the output is fixed at a voltage equal to 1/2 either supply
voltage (for equal bipolar supplies). Under this condition
P
loading.
A
DL
10k
+ P
= V
D
+5V
–5V
•
S
2
5k
5k
/(4 • R
JA
Offset Adjustment.
. The total internal power dissipation (P
V
I
0.1µF
L
0.1µF
) where R
500
20k
R
G
328
DQ
L
) and additional power dissi-
DL
includes feedback network
OPA642
) to deliver load power.
±200mV Output Adjustment
OPA642
V
V
+5V
–5V
O
I
= –
1k
Supply Decoupling
R
F
R
R
J
) is given by
F
G
Not Shown
= –2
D
) is the
V
O
DL
®