AT25F1024AY4-10YU-2.7 ATMEL [ATMEL Corporation], AT25F1024AY4-10YU-2.7 Datasheet

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AT25F1024AY4-10YU-2.7

Manufacturer Part Number
AT25F1024AY4-10YU-2.7
Description
SPI Serial Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
Description
The AT25F1024A provides 1,048,576 bits of serial reprogrammable Flash memory
organized as 131,072 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The AT25F1024A is available in a space-saving 8-lead JEDEC SOIC
and 8-lead SAP packages.
The AT25F1024A is enabled through the Chip Select pin (CS) and accessed via a 3-
wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial
Clock (SCK). All write cycles are completely self-timed.
BLOCK WRITE protection for top 1/4, top 1/2 or the entire memory array is enabled by
programming the status register. Separate write enable and write disable instructions
are provided for additional data protection. Hardware data protection is provided via
the WP pin to protect against inadvertent write attempts to the status register. The
HOLD pin may be used to suspend any serial communication without resetting the
serial sequence.
Pin Configurations
Pin Name
CS
SCK
SI
SO
GND
VCC
WP
HOLD
Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
20 MHz Clock Rate
Byte Mode and 256-byte Page Mode for Program Operations
Sector Architecture:
Product Identification Mode
Low-voltage Operation
Sector Write Protection
Write Protect (WP) Pin and Write Disable Instructions for
both Hardware and Software Data Protection
Self-timed Program Cycle (20 µs/Byte Typical)
Self-timed Sector Erase Cycle (1 second/Sector Typical)
Single Cycle Reprogramming (Erase and Program) for Status Register
High Reliability
Lead-free/Halogen-free Devices
8-lead JEDEC SOIC and 8-lead SAP Packages
– Datasheet Describes Mode 0 Operation
– Four Sectors with 32K Bytes Each (1M)
– 128 Pages per Sector
– 2.7 (V
– Endurance: 10,000 Write Cycles Typical
CC
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Write Protect
Suspends Serial Input
= 2.7V to 3.6V)
GND
WP
HOLD
SO
CS
VCC
SCK
SI
8-lead SOIC
Bottom View
1
2
3
4
8-lead SAP
8
7
6
5
8
7
6
5
1
2
3
4
CS
SO
WP
GND
VCC
HOLD
SCK
SI
SPI Serial
Memory
1M (131,072 x 8)
AT25F1024A
Advance
Information
Rev. 3346C–SEEPR–7/04
1

Related parts for AT25F1024AY4-10YU-2.7

AT25F1024AY4-10YU-2.7 Summary of contents

Page 1

... Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All write cycles are completely self-timed. BLOCK WRITE protection for top 1/4, top 1/2 or the entire memory array is enabled by programming the status register. Separate write enable and write disable instructions are provided for additional data protection ...

Page 2

Absolute Maximum Ratings* Operating Temperature.................................... - +85 C Storage Temperature ..................................... - +150 C Voltage on Any Pin with Respect to Ground .....................................-1.0V to +3.6V Maximum Operating Voltage ............................................ 3.6V DC Output Current........................................................ 5.0 mA Block ...

Page 3

Pin Capacitance Applicable over recommended operating range from T Symbol Test Conditions C Output Capacitance (SO) OUT C Input Capacitance (CS, SCK, SI, WP, HOLD) IN Note: 1. This parameter is characterized and is not 100% tested. DC Characteristics ...

Page 4

AC Characteristics (Preliminary – Subject to Change) Applicable over recommended operating range from TTL Gate and 30 pF (unless otherwise noted). L Symbol Parameter f SCK Clock Frequency SCK t Input Rise Time RI t Input ...

Page 5

Serial Interface Description 3346C–SEEPR–7/04 MASTER: The device that generates the serial clock. SLAVE: Because the Serial Clock pin (SCK) is always an input, the AT25F1024A always operates as a slave. TRANSMITTER/RECEIVER: The AT25F1024A has separate pins designated for data transmission ...

Page 6

SPI Serial Interface 6 MASTER: MICROCONTROLLER DATA OUT (MOSI) DATA IN (MISO) SERIAL CLOCK (SPI CK) SS0 SS1 SS2 SS3 SLAVE: AT25F1024A SI SO SCK SCK SCK SCK CS 3346C–SEEPR–7/04 ...

Page 7

... Set Write Enable Latch Reset Write Enable Latch Read Status Register Write Status Register Read Data from Memory Array Program Data Into Memory Array Erase One Sector in Memory Array Erase All Sectors in Memory Array Read Manufacturer and Product ID Bit 4 Bit 3 Bit 2 Bit 1 X ...

Page 8

... WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select one of four levels of protection for the AT25F1024A. The AT25F1024A is divided into four sectors where the top quarter (1/4), top half (1/2), or all of the memory sectors can be protected (locked out) from write. Any of the locked-out sectors will therefore be READ only ...

Page 9

... For the AT25F1024A, when the highest address is reached, the address counter will roll over to the lowest address allowing the entire memory to be read in one continuous READ instruction. ...

Page 10

A single PROGRAM instruction programs 1 to 256 consecutive bytes within a page not write protected. The starting byte could be anywhere within the page. When the end of the page is reached, the address will ...

Page 11

Timing Diagrams (for SPI Mode 0 (0, 0)) Synchronous Data Timing CSS V IH SCK HI WREN Timing WRDI Timing ...

Page 12

RDSR Timing CS 0 SCK INSTRUCTION SI HIGH IMPEDANCE SO WRSR Timing READ Timing SCK SI INSTRUCTION HIGH IMPEDANCE MSB ...

Page 13

PROGRAM Timing SCK SI INSTRUCTION HIGH IMPEDANCE SO HOLD Timing CS SCK HOLD SO SECTOR ERASE Timing X = Don’t Care bit 3346C–SEEPR–7/ ...

Page 14

CHIP ERASE Timing RDID Timing Don’t Care bit MANUFACTURER CODE (ATMEL DEVICE CODE 3346C–SEEPR–7/04 ...

Page 15

... Ordering Information Ordering Code AT25F1024AN-10SU-2.7 AT25F1024AY4-10YU-2.7 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) 8Y4 8-lead, 6. 4.90 mm Body, Dual Footprint, Non-leaded, Small Array Package (SAP) -2.7 Low-voltage (2.7V to 3.6V) 3346C–SEEPR–7/04 Package 8S1 Lead-free/Halogen-free Industrial 8Y4 Package Type Options ...

Page 16

Package Drawing 8S1 – JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO ...

Page 17

SAP PIN 1 INDEX AREA D E 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80817 R 3346C–SEEPR–7/04 A PIN COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN A – A1 0.00 ...

Page 18

... Atmel Corporation 2004. All rights reserved. Atmel trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others. Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 ...

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