COP424C NSC [National Semiconductor], COP424C Datasheet
COP424C
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COP424C Summary of contents
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... Y Power saving IDLE state and HALT mode instruction time plus software selectable clocks ROM 128 x 4 RAM (COP444C COP445C ROM RAM (COP424C COP425C Y COP426C lines (COP444C and COP424C) Y True vectored interrupt plus restart Y Three-level subroutine stack ...
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... COP424C COP425C COP426C and COP444C COP445C Absolute Maximum Ratings Supply Voltage ( Voltage at any Pin Total Allowable Source Current Total Allowable Sink Current Operating Temperature Range Storage Temperature Range Lead Temperature (soldering 10 seconds) DC Electrical Characteristics Parameter Operating Voltage ...
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COP324C COP325C COP326C and COP344C COP345C Absolute Maximum Ratings Supply Voltage Voltage at any Pin Total Allowable Source Current Total Allowable Sink Current Operating Temperature Range b Storage Temperature Range Lead ...
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... COP424C COP425C COP426C and COP444C COP445C AC Electrical Characteristics Parameter Instruction Cycle Time (tc) Operating CKI 4 mode d Frequency 8 mode d 16 mode d 4 mode d 8 mode d 16 mode d Duty Cycle (Note 4) Rise Time (Note 4) Fall Time (Note 4) Instruction Cycle Time RC Oscillator (Note 4) Inputs (See Figure 3 ) ...
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COP324C COP325C COP326C and COP344C COP345C AC Electrical Characteristics Parameter Instruction Cycle Time (tc) Operating CKI 4 mode d Frequency 8 mode d 16 mode d 4 mode d 8 mode d 16 mode d Duty Cycle (Note 4) Rise ...
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... Order Number COP326C-XXX WM or COP426C-XXX WM See NS Surface Mount Package M20B Order Number COP324C-XXX D COPC324-XXX WM COP344C-XXX D COP424C-XXX D COPC424-XXX WM or COP444C-XXX D Order Number COP324C-XXX N COP344C-XXX N COPC344-XXX WM COP424C-XXX N COP444C-XXX N or COPC444-XXX WM Pin Description L7 – L0 8-bit bidirectional port with TRI-STATE G3 – G0 4-bit bidirectional I O port D3 – ...
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... Data memory consists of a 256-bit RAM for the COP424C 425C 426C organized as 4 data registers of 16 digits The B register is 6 bits long Upper 2 bits (Br) select 1 ...
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Functional Description (Continued) The SIO register functions as a 4-bit serial-in serial-out shift register for MICROWIRE I O and COPS peripherals binary counter (depending on the contents of the EN regis- ter) Its contents can be exchanged ...
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Functional Description (Continued) 3 EN3 in conjunction with EN0 affects the SO output With EN0 set (binary counter option selected) SO will output the value loaded into EN3 With EN0 reset (serial shift register option selected) setting EN3 enables SO ...
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... Upon initialization the PC register is cleared to 0 (ROM ad- dress 0) and the and G registers are cleared The SKL latch is set thus enabling clock output Data Memory (RAM) is not cleared upon initializa- tion The first instruction at address 0 must be a CLRA (clear A register) ...
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Functional Description (Continued) The HALT mode is the minimum power dissipation state Note If the user has selected dual-clock with D0 as external oscillator (option 30 2) AND the COP444C 424C is e running with the D0 clock the HALT ...
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Block Diagram (Continued) FIGURE 9B Halt Mode FIGURE 10A Clock and Timer without Dual-Clock FIGURE 10B Clock and Timer with Dual-Clock One-Pin Oscillator 5259 – 5259 – 5259 – 13 ...
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... TABLE II Instruction Set Table Symbols Symbol Definition Internal Architecture Symbols A 4-bit accumulator B 7-bit RAM address register (6-bit for COP424C) Br Upper 3 bits of B (register address) (2-bit for COP424C) Bd Lower 4 bits of B (digit address) C 1-bit carry register D ...
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... RET 48 0100 1000 RETSK 49 0100 1001 HALT 33 0011 0011 38 0011 1000 IT 33 0011 0011 39 0011 1001 MEMORY REFERENCE INSTRUCTIONS CAMT 33 0011 0011 3F 0011 1111 CTMA 33 0011 0011 2F 0010 1111 CAMQ 33 0011 0011 3C 0011 1100 CQMA 33 0011 0011 2C 0010 1100 ...
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... Instruction Set (Continued) Table III COP444C 445C Instruction Set (Continued) Machine Hex Language Mnemonic Operand Code MEMORY REFERENCE INSTRUCTIONS (Continued) STII y 7 0111 0110 b XAD 0010 0011 XDS 0111 b XIS REGISTER REFERENCE INSTRUCTIONS ...
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Instruction Set (Continued) Table III COP444C 445C Instruction Set (Continued) Hex Language Mnemonic Operand Code INPUT OUTPUT INSTRUCTIONS ING 33 0011 0011 2A 0010 1010 ININ 33 0011 0011 28 0010 1000 INIL 33 0011 0011 29 0010 1001 INL ...
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... LQID located in the last word of every fourth page (i e hex address 0FF 1FF 2FF 3FF 4FF etc ) will access data in the next group of four pages Note The COP424C 425C 426C needs only 10 bits to address its ROM Therefore the eleventh bit (P10) is ignored Power Dissipation ...
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Power Dissipation (Continued instruction is executed the chip goes into the IDLE mode until the timer overflows In IDLE mode the current drain can be calculated from the following equation Ici ...
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Power Dissipation (Continued) Minimum Sink Current COP444C 424C 445C 425C Low Current Option Maximum Source Current FIGURE 12 Input Output Characteristics Option List The COP444C 445C 424C 425C COP426C grammable options are assigned numbers which corre- spond with the COP444C ...
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Option List (Continued) Option 18 SK Driver (same as option 17) Option 19 IN0 Input (same as option 9) Option 20 IN3 Input (same as option 9) Option Port (same as option 17) Option 22 G1 ...
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21 ...
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Physical Dimensions inches (millimeters) 20-Lead Hermetic Dual-In-Line Package (D) Order Number COP326C-XXX D COP426C-XXX D 24-Lead Hermetic Dual-In-Line Package (D) Order Number COP425C-XXX D COP325C-XXX D NS Package Number D20A COP445C-XXX D COP345C-XXX D NS Package Number D24C 22 ...
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... Physical Dimensions inches (millimeters) (Continued) 28-Lead Hermetic Dual-In-Line Package (D) Order Number COP424C-XXX D COP324C-XXX D 20-Lead Molded Dual-In-Line Package (N) Order Number COP426C-XXX N and COP326C-XXX N COP444C-XXX D COP344C-XXX D NS Package Number D28C NS Package Number N20A 23 ...
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... Molded Dual-In-Line Package (N) Order Number COP425C-XXX N COP325C-XXX N COP445C-XXX N COP345C-XXX N 28-Lead Molded Dual-In-Line Package (N) Order Number COP424C-XXX N COP324C-XXX N COP444C-XXX N COP344C-XXX N LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL ...