LT3640EFE LINER [Linear Technology], LT3640EFE Datasheet - Page 10

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LT3640EFE

Manufacturer Part Number
LT3640EFE
Description
Dual Monolithic Buck Regulator with Power-On Reset and Watchdog Timer
Manufacturer
LINER [Linear Technology]
Datasheet

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LT3640
TIMING DIAGRAMS
OPERATION
The LT3640 is a dual channel, constant-frequency, current
mode monolithic buck switching regulator with power-on
reset and watchdog timer. Both channels are synchronized
to a single oscillator with frequency set by RT. Operation can
be best understood by referring to the Block Diagram.
Buck Regulators
The high voltage channel is a nonsynchronous buck
regulator that operates from the V
oscillator cycle sets an SR latch and turns on the internal
NPN power switch. An amplifi er and comparator monitor
the current fl owing between the V
the switch off when this current reaches a level determined
by the voltage at VC1 node. An error amplifi er measures
the output voltage through an external resistor divider tied
to the FB1 pin and servos the VC1 node. The reference
of the error amplifi er is determined by the lower of the
internal reference and the voltage at the SS1 pin. If the error
amplifi er’s output increases, more current is delivered to
the output; if it decreases, less current is delivered.
10
WDO
RST
WDI
FB
IN
t < t
IN
and SW1 pins, turning
WDL
pin. The start of each
t
RST
t
UV
Power-On Reset Timing
t
DLY
Watchdog Timing
t < t
WDU
An active clamp (not shown) on the VC1 node provides
peak current limit. A DA pin current comparator extends
the oscillator cycle until the catch diode current is below
the valley current limit. Both the peak and valley current
limits help to control the inductor current in fault condi-
tions such as shorted output with high V
limits are reduced when the voltage at the FB1 pin is below
0.2V. This current foldback helps to control the inductor
current during start-up and overload.
The NPN power switch driver operates from either the V
pin or the BST pin. An external capacitor and diode are
used to generate a voltage between the BST and SW pins.
During the power-up of the LT3640, an internal 5mA current
source charges the external BST capacitor. The regulator
starts switching when the (BST-SW) voltage reaches the
2V threshold. The internal NPN power switch can be fully
saturated for effi cient operation when the (BST-SW) volt-
age is between 2.3V and 5.5V.
The low voltage channel is a synchronous buck regulator
that operates from the V
t
WDL
< t < t
t
RST
WDU
t
WDU
t
RST
IN2
pin. It starts switching only
3640 TD
IN
. Both current
3640p
IN

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