LT3686 LINER [Linear Technology], LT3686 Datasheet - Page 23

• Manufacturer Part Number: LT3686
• Manufacturer: LINER [Linear Technology]

ApplicAtions inForMAtion
PCB Layout
For proper operation and minimum EMI, care must be taken
during printed circuit board layout. Figure 17 shows the
recommended component placement with trace, ground
plane and via locations. Note that large, switched currents
flow in the LT3686’s V
and the input capacitor (C2). The loop formed by these
components should be as small as possible and tied to
system ground in only one place. These components, along
with the inductor and output capacitor, should be placed on
the same side of the circuit board, and their connections
should be made on that layer. Place a local, unbroken ground
plane below these components, and tie this ground plane
to system ground at one location, ideally at the ground
IN
and SW pins, the catch diode (D1)
FB
BD
Figure 17. PCB Layout
SS
OUT
V
C2
IN
RT
terminal of the output capacitor C1. The SW and BOOST
nodes should be as small as possible. Finally, keep the
FB node small so that the ground pin and ground traces
will shield it from the SW and BOOST nodes. Include vias
near the exposed GND pad of the LT3686 to help remove
heat from the LT3686 to the ground plane.
High Temperature Considerations
The die temperature of the LT3686 must be lower than the
maximum rating of 125°C. For high ambient temperatures,
care should be taken in the layout of the circuit to ensure
good heat sinking of the LT3686. The maximum load
current should be derated as the ambient temperature
approaches the maximum allowed junction temperature.
UVLO
SW
DA
D1
MODE
BST
3686 F17
LT3686

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