S-8233BBFT SII [Seiko Instruments Inc], S-8233BBFT Datasheet - Page 9

• Manufacturer Part Number: S-8233BBFT
• Description: BATTERY PROTECTION IC (FOR A 3-SERIAL-CELL PACK)
• Manufacturer: SII [Seiko Instruments Inc]

(8) Measurement 8 Measurement circuit 5
(11) Measurement 11 Measurement circuit 6
(7) Measurement 7 Measurement circuit 4
(9) Measurement 9 Measurement circuit 6
(10) Measurement 10 Measurement circuit 6
(12) Measurement 12 Measurement circuit 7
(6) Measurement 6 Measurement circuit 3
Rev.4.2
Set S1 to ON, S2 to OFF, V1, V2, and V3 to 3.5 V, and V5 to 0 V under normal condition. Increase V6 from
0 V gradually. The V6 voltage when I6 = 10 μA is DOP'L' voltage (V
Set S1 to OFF, S2 to ON, V1, V2, V3 to 3.5 V, and V5 to V
V7 from 0 V gradually. The V7 voltage when I7 = 10 μA is the DOP'H' voltage (V
Set V1, V2, V3 to 3.5 V and V5 to 0 V under normal condition. Increase V6 from 0 V gradually. The V6
voltage when I1 = 10 μA is the COP'L' voltage (V
Set V1, V2, V3 to 3.5 V under normal condition. Increase V1 from 3.5 V to 4.5 V immediately (within 10 μs).
The time after V1 becomes 4.5 V until COP goes 'H' is the over charge detection delay time 1 (t
Set V1, V2, V3 to 3.5 V under normal condition. Decrease V1 from 3.5 V to 1.9 V immediately (within 10
μs). The time after V1 becomes 1.9 V until DOP goes 'H' is the over discharge detection delay time 1 (t
Set S1 to ON, V1, V2, and V3 to 3.5 V, and V5 to 10.5 V under normal condition. V5/I5 is the internal
resistance between VCC and VMP (R
Set S1 to ON, V1, V2, and V3 to 1.5 V, and V5 to 4.1 V under over discharge condition. (4.5-V5)/I5 is the
internal resistance between VSS and VMP (R
Set V1, V2, V3 to 3.5 V under normal condition. Increase V2 from 3.5 V to 4.5 V immediately (within 10
μs). The time after V2 becomes 4.5 V until COP goes 'H' is the over charge detection delay time 2 (t
Set V1, V2, V3 to 3.5 V under normal condition. Decrease V2 from 3.5 V to 1.9 V immediately (within 10
μs). The time after V2 becomes 1.9 V until DOP goes 'H' is the over discharge detection delay time 2 (t
Set V1, V2, V3 to 3.5 V and S1 to OFF under normal condition. Increase V5 from 0 V to 0.55 V
immediately (within 10 μs). The time after V5 becomes 0.55 V until DOP goes 'H' is the over current
detection delay time 1 (t
Set V1, V2, V3 to 3.5 V and S1 to OFF under normal condition. Increase V5 from 0 V to 0.75 V
immediately (within 10 μs). The time after V4 becomes 0.75 V until DOP goes 'H' is the over current
detection delay time 2 (t
Set V1, V2, V3 to 3.5 V under normal condition. Increase V3 from 3.5 V to 4.5 V immediately (within 10
μs). The time after V3 becomes 4.5 V until COP goes 'H' is the over charge detection delay time 3 (t
Set V1, V2, V3 to 3.5 V under normal condition. Decrease V3 from 3.5 V to 1.9 V immediately (within 10
μs). The time after V3 becomes 1.9 V until DOP goes 'H' is the over discharge detection delay time 3
(t
Set S1 to ON to inhibit over discharge detection. Set V1, V2, V3 to 4.0 V and increase V5 from 0 V to 6.0 V
immediately (within 1 μs) and decrease V1, V2, and V3 to 2.0 V at a time. The time after V5 becomes 6.0
V until DOP goes 'H' is the over current detection delay time 3 (t
DD3
).
_00
IOV1
IOV2
).
)
BATTERY PROTECTION IC FOR 3-SERIAl-CELL PACK
VCM
).
Seiko Instruments Inc.
VCM
C0 (L)
).
).
IOV2
+0.1 V under over current condition. Increase
IOV3
D0 (L)
).
).
DO (H)
).
S-8233B Series
CU1
).
CU2
CU3
DD1
DD2
).
).
).
).
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