LT3028 LINER [Linear Technology], LT3028 Datasheet - Page 13

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LT3028

Manufacturer Part Number
LT3028
Description
Dual 100mA/500mA Low Dropout, Low Noise,Micropower Regulators with Independent Inputs
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIO S I FOR ATIO
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or
microphone works. For a ceramic capacitor the stress
can be induced by vibrations in the system or thermal
transients. The resulting voltages produced can cause
appreciable amounts of noise, especially when a ceramic
capacitor is used for noise bypassing. A ceramic capaci-
tor produced Figure 6’s trace in response to light tapping
from a pencil. Similar vibration induced behavior can
masquerade as increased output voltage noise.
Figure 6. Noise Resulting from Tapping on a Ceramic Capacitor
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125°C). The
power dissipated by the device will be made up of two
components for each output:
1. Output current multiplied by the input/output voltage
2. GND pin current multiplied by the input voltage:
The ground pin current can be found by examining the
GND Pin Current curves in the Typical Performance Char-
acteristics section. Power dissipation will be equal to the
sum of the two components listed above.
The LT3028 regulator has internal thermal limiting de-
signed to protect the device during overload conditions.
differential: (I
(I
500µV/DIV
GND
V
OUT
)(V
IN
C
C
I
).
LOAD
OUT
BYP
= 10µF
= 0.01µF
OUT
= 100mA
U
)(V
IN
100ms/DIV
– V
U
OUT
), and
W
3028 F05
U
For continuous normal conditions, the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Table 1. FE Package, 16-Lead TSSOP
*Device is mounted on topside.
Table 2. DHC Package, 16-Lead DFN
*Device is mounted on topside.
The thermal resistance junction-to-case (θ
at the Exposed Pad on the back of the die is 10°C/W for the
DFN package and 8°C/W for the TSSOP package.
Calculating Junction Temperature
Example: Given Output 1 set for an output voltage of 3.3V,
Output 2 set for an output voltage of 2.5V, an input voltage
range of 3.8V to 5V, an output current range of 0mA to
500mA for Output 1, an output current range of 0mA to
100mA for Output 2 and a maximum ambient temperature
of 50°C, what will the maximum junction temperature be?
TOPSIDE*
TOPSIDE*
2500mm
1000mm
2500mm
1000mm
225mm
100mm
225mm
100mm
COPPER AREA
COPPER AREA
2
2
2
2
2
2
2
2
BACKSIDE
BACKSIDE
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2
2
2
2
2
2
2
2
BOARD AREA (JUNCTION-TO-AMBIENT)
BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2
2
2
2
2
2
2
2
THERMAL RESISTANCE
THERMAL RESISTANCE
JC
38°C/W
43°C/W
48°C/W
60°C/W
40°C/W
45°C/W
50°C/W
62°C/W
LT3028
), measured
13
3028f

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