STM8S207C6T3B STMICROELECTRONICS [STMicroelectronics], STM8S207C6T3B Datasheet - Page 76

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STM8S207C6T3B

Manufacturer Part Number
STM8S207C6T3B
Description
Performance line, 24 MHz STM8S 8-bit MCU, up to 128 KB Flash
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Electrical characteristics
76/103
Figure 34. Typical NRST pull-up resistance vs V
Figure 35. Typical NRST pull-up current vs V
The reset network shown in
must ensure that the level on the NRST pin can go below the V
Table
sensitive applications, the capacity of the external reset capacitor can be reduced to limit
charge/discharge current. If the NRSTsignal is used to reset the external circuitry, care must
be taken of the charge/discharge time of the external capacitor to fulfill the external device’s
reset timing conditions. The minimum recommended capacity is 10 nF.
Figure 36. Recommended reset pin protection
(optional)
41. Otherwise the reset is not taken into account internally. For power consumption
External
circuit
reset
140
120
100
80
60
40
20
0.1µF
0
0
60
55
50
45
40
35
30
Figure 36
2.5
Doc ID 14733 Rev 12
1
3
NRST
protects the device against parasitic resets. The user
3.5
2
V
DD
4
R
V
PU
V
DD
DD
3
[V]
[V]
4.5
DD
@ 4 temperatures
DD
5
4
@ 4 temperatures
Filter
5.5
5
STM8S207xx, STM8S208xx
-40˚C
25˚C
85˚C
125˚C
IL
6
max. level specified in
Internal reset
ai15069
-40˚C
25˚C
85˚C
125˚C
6
STM8

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